linux-kernel - RE: [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support

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Message-ID: <DB6PR0402MB27605E6DAECE069C12391FDD885E9@DB6PR0402MB2760.eurprd04.prod.outlook.com>
Date:   Fri, 30 Apr 2021 06:19:25 +0000
From:   Peng Fan <peng.fan@....com>
To:     "Peng Fan (OSS)" <peng.fan@....nxp.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>
CC:     "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "krzk@...nel.org" <krzk@...nel.org>,
        "agx@...xcpu.org" <agx@...xcpu.org>,
        "marex@...x.de" <marex@...x.de>,
        "andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Jacky Bai <ping.bai@....com>,
        "frieder.schrempf@...tron.de" <frieder.schrempf@...tron.de>,
        "aford173@...il.com" <aford173@...il.com>,
        Abel Vesa <abel.vesa@....com>
Subject: RE: [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support

> Subject: [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support
> 
> From: Peng Fan <peng.fan@....com>
> 
> V2:
>  Fix yaml check failure

Forget the address Jacky's comments on patch 3,4 in V1.
Will send V3 to add fix.

Thanks,
Peng.

> 
> Previously there is an effort from Abel that take BLK-CTL as clock provider, but
> it turns out that there is A/B lock issue and we are not able resolve that.
> 
> Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
> as a power domain provider and use GPC's domain as parent, the consumer
> node take BLK-CTL as power domain input.
> 
> This patchset has been tested on i.MX8MM EVK board, but one hack is not
> included in the patchset is that the DISPMIX BLK-CTL MIPI_M/S_RESET not
> implemented. Per Lucas, we will finally have a MIPI DPHY driver, so fine to
> leave it.
> 
> Thanks for Lucas's suggestion, Frieder Schrempf for collecting all the patches,
> Abel's previous BLK-CTL work, Jacky Bai on help debug issues.
> 
> Peng Fan (4):
>   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains
>   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL
>   soc: imx: Add generic blk-ctl driver
>   soc: imx: Add blk-ctl driver for i.MX8MM
> 
>  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  73 +++++
>  drivers/soc/imx/Makefile                      |   2 +-
>  drivers/soc/imx/blk-ctl-imx8mm.c              | 138 ++++++++
>  drivers/soc/imx/blk-ctl.c                     | 303
> ++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h                     |  76 +++++
>  include/dt-bindings/power/imx8mm-power.h      |  11 +
>  6 files changed, 602 insertions(+), 1 deletion(-)  create mode 100644
> Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
>  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c  create mode
> 100644 drivers/soc/imx/blk-ctl.c  create mode 100644
> drivers/soc/imx/blk-ctl.h
> 
> --
> 2.30.0