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Date:   Mon, 3 May 2021 16:57:38 +0200
From:   Frieder Schrempf <frieder.schrempf@...tron.de>
To:     "Peng Fan (OSS)" <peng.fan@....nxp.com>, robh+dt@...nel.org,
        shawnguo@...nel.org, s.hauer@...gutronix.de
Cc:     kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        p.zabel@...gutronix.de, l.stach@...gutronix.de, krzk@...nel.org,
        agx@...xcpu.org, marex@...x.de, andrew.smirnov@...il.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, ping.bai@....com, aford173@...il.com,
        abel.vesa@....com, Peng Fan <peng.fan@....com>
Subject: Re: [PATCH V2 0/4] soc: imx: add i.MX BLK-CTL support

Hi Peng,

On 30.04.21 07:27, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@....com>
> 
> V2:
>   Fix yaml check failure
> 
> Previously there is an effort from Abel that take BLK-CTL as clock
> provider, but it turns out that there is A/B lock issue and we are
> not able resolve that.
> 
> Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
> as a power domain provider and use GPC's domain as parent, the consumer
> node take BLK-CTL as power domain input.
> 
> This patchset has been tested on i.MX8MM EVK board, but one hack
> is not included in the patchset is that the DISPMIX BLK-CTL MIPI_M/S_RESET
> not implemented. Per Lucas, we will finally have a MIPI DPHY driver,
> so fine to leave it.

Thanks for your work. I would like to test this together with the DSIM 
and PHY driver by Michael and Marek. So far the boot hangs when probing 
the DSIM, but I'm not even sure if my DT is correct.

With the DSIM PHY driver (see [1]) in place, the GPR_MIPI_M_RESETN 
should be set correctly, right?

Would you mind sharing your imx8mm.dtsi, that you used for testing?

Thanks
Frieder

[1] 
https://patchwork.kernel.org/project/linux-samsung-soc/patch/20201003225020.164358-1-marex@denx.de/

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