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Message-ID: <9871b811-f018-eac8-1816-72f982c2b82a@linaro.org>
Date:   Wed, 12 May 2021 14:29:12 +0300
From:   Stanimir Varbanov <stanimir.varbanov@...aro.org>
To:     Matthias Kaehlcke <mka@...omium.org>,
        Dikshita Agarwal <dikshita@...eaurora.org>
Cc:     andy.gross@...aro.org, david.brown@...aro.org, robh+dt@...nel.org,
        mark.rutland@....com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        vgarodia@...eaurora.org
Subject: Re: [PATCH] dt-bindings: media: venus: Add sc7280 dt schema

Hi Matthias,

On 4/27/21 12:30 AM, Matthias Kaehlcke wrote:
> From a quick glance this looks extremely similar to the venus binding
> for sc7180. Is there really a good reason for a separate binding?

The Venus IP is different (newer) for sc7280 (Iris2 vs AR50), and I
think it is clearer if we have separate yaml for it.

> 
> On Mon, Apr 26, 2021 at 03:51:55PM +0530, Dikshita Agarwal wrote:
>> Add a schema description for the venus video encoder/decoder on the sc7280.
>>
>> Signed-off-by: Dikshita Agarwal <dikshita@...eaurora.org>
>> ---
>>  .../bindings/media/qcom,sc7280-venus.yaml          | 158 +++++++++++++++++++++
>>  1 file changed, 158 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
>> new file mode 100644
>> index 0000000..a258d97
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
>> @@ -0,0 +1,158 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>> +
>> +title: Qualcomm Venus video encode and decode accelerators
>> +
>> +maintainers:
>> +  - Stanimir Varbanov <stanimir.varbanov@...aro.org>
>> +
>> +description: |
>> +  The Venus IP is a video encode and decode accelerator present
>> +  on Qualcomm platforms
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sc7280-venus
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +  power-domains:
>> +    minItems: 2
>> +    maxItems: 3
>> +
>> +  power-domain-names:
>> +    minItems: 2
>> +    maxItems: 3
>> +    items:
>> +      - const: venus
>> +      - const: vcodec0
>> +
>> +  clocks:
>> +    maxItems: 5
>> +
>> +  clock-names:
>> +    items:
>> +      - const: core_clk
>> +      - const: video_cc_mvsc_ctl_axi
>> +      - const: iface_clk
>> +      - const: vcodec_clk
>> +      - const: video_cc_mvs0_ctl_axi
>> +
>> +  iommus:
>> +    maxItems: 2
>> +
>> +  memory-region:
>> +    maxItems: 1
>> +
>> +  interconnects:
>> +    maxItems: 2
>> +
>> +  interconnect-names:
>> +    items:
>> +      - const: cpu-cfg
>> +      - const: video-mem
>> +
>> +  video-decoder:
>> +    type: object
>> +
>> +    properties:
>> +      compatible:
>> +        const: venus-decoder
>> +
>> +    required:
>> +      - compatible
>> +
>> +    additionalProperties: false
>> +
>> +  video-encoder:
>> +    type: object
>> +
>> +    properties:
>> +      compatible:
>> +        const: venus-encoder
>> +
>> +    required:
>> +      - compatible
>> +
>> +    additionalProperties: false
>> +
>> +  video-firmware:
>> +    type: object
>> +
>> +    description: |
>> +      Firmware subnode is needed when the platform does not
>> +      have TrustZone.
>> +
>> +    properties:
>> +      iommus:
>> +        maxItems: 1
>> +
>> +    required:
>> +      - iommus
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - power-domains
>> +  - power-domain-names
>> +  - clocks
>> +  - clock-names
>> +  - iommus
>> +  - memory-region
>> +  - video-decoder
>> +  - video-encoder
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +        #include <dt-bindings/clock/qcom,videocc-sc7280.h>
>> +
>> +        venus: video-codec@...0000 {
>> +                compatible = "qcom,sc7280-venus";
>> +                reg = <0x0aa00000 0xd0600>;
>> +                interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> +                clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
>> +                         <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
>> +                         <&videocc VIDEO_CC_VENUS_AHB_CLK>,
>> +                         <&videocc VIDEO_CC_MVS0_CORE_CLK>,
>> +                         <&videocc VIDEO_CC_MVS0_AXI_CLK>;
>> +                clock-names = "core_clk", "video_cc_mvsc_ctl_axi",
>> +                              "iface_clk", "vcodec_clk",
>> +                              "video_cc_mvs0_ctl_axi";
>> +
>> +                power-domains = <&videocc MVSC_GDSC>,
>> +                                <&videocc MVS0_GDSC>;
>> +                power-domain-names = "venus", "vcodec0";
>> +
>> +                interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>
>> +                                <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
>> +                interconnect-names = "cpu-cfg", "video-mem";
>> +
>> +                iommus = <&apps_smmu 0x2180 0x20>,
>> +                         <&apps_smmu 0x2184 0x20>;
>> +
>> +                memory-region = <&video_mem>;
>> +
>> +                video-decoder {
>> +                        compatible = "venus-decoder";
>> +                };
>> +
>> +                video-encoder {
>> +                        compatible = "venus-encoder";
>> +                };
>> +
>> +                video-firmware {
>> +                        iommus = <&apps_smmu 0x21a2 0x0>;
>> +                };
>> +        };
>> -- 
>> 2.7.4
>>

-- 
regards,
Stan

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