[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210518234309.29014-1-ansuelsmth@gmail.com>
Date: Wed, 19 May 2021 01:43:06 +0200
From: Ansuel Smith <ansuelsmth@...il.com>
To: Thara Gopinath <thara.gopinath@...aro.org>
Cc: Ansuel Smith <ansuelsmth@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Amit Kucheria <amitk@...nel.org>,
Zhang Rui <rui.zhang@...el.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/3] drivers: thermal: tsens: add timeout to get_tem_tsens_valid
The function can loop and lock the system if for whatever reason the bit
for the target sensor is NEVER valid. This is the case if a sensor is
disabled by the factory and the valid bit is never reported as actually
valid. Add a timeout check and exit if a timeout occurs. As this is
a very rare condition, handle the timeout only if the first read fails.
Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
---
drivers/thermal/qcom/tsens.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index b1162e566a70..38afde1a599f 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -599,6 +599,7 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
int hw_id = s->hw_id;
u32 temp_idx = LAST_TEMP_0 + hw_id;
u32 valid_idx = VALID_0 + hw_id;
+ unsigned long timeout;
u32 valid;
int ret;
@@ -607,13 +608,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
ret = regmap_field_read(priv->rf[valid_idx], &valid);
if (ret)
return ret;
- while (!valid) {
- /* Valid bit is 0 for 6 AHB clock cycles.
- * At 19.2MHz, 1 AHB clock is ~60ns.
- * We should enter this loop very, very rarely.
- */
- ndelay(400);
- ret = regmap_field_read(priv->rf[valid_idx], &valid);
+
+ if (!valid) {
+ timeout = jiffies + msecs_to_jiffies(20);
+
+ do {
+ /* Valid bit is 0 for 6 AHB clock cycles.
+ * At 19.2MHz, 1 AHB clock is ~60ns.
+ * We should enter this loop very, very rarely.
+ */
+ ndelay(400);
+ ret = regmap_field_read(priv->rf[valid_idx], &valid);
+ if (valid || ret)
+ break;
+ } while (!(ret = time_after_eq(jiffies, timeout)));
+
if (ret)
return ret;
}
--
2.30.2
Powered by blists - more mailing lists