linux-kernel - Re: [PATCH v6 05/16] KVM: x86/pmu: Introduce the ctrl

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Message-ID: <1fb87ea1-d7e6-0ca3-f3ed-4007a7e5a7d7@intel.com>
Date:   Tue, 18 May 2021 15:55:13 +0800
From:   "Xu, Like" <like.xu@...el.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Borislav Petkov <bp@...en8.de>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, weijiang.yang@...el.com,
        Kan Liang <kan.liang@...ux.intel.com>, ak@...ux.intel.com,
        wei.w.wang@...el.com, eranian@...gle.com, liuxiangdong5@...wei.com,
        linux-kernel@...r.kernel.org, x86@...nel.org, kvm@...r.kernel.org,
        Like Xu <like.xu@...ux.intel.com>
Subject: Re: [PATCH v6 05/16] KVM: x86/pmu: Introduce the ctrl_mask value for
 fixed counter

On 2021/5/17 16:18, Peter Zijlstra wrote:
> On Tue, May 11, 2021 at 10:42:03AM +0800, Like Xu wrote:
>> The mask value of fixed counter control register should be dynamic
>> adjusted with the number of fixed counters. This patch introduces a
>> variable that includes the reserved bits of fixed counter control
>> registers. This is needed for later Ice Lake fixed counter changes.
>>
>> Co-developed-by: Luwei Kang <luwei.kang@...el.com>
>> Signed-off-by: Luwei Kang <luwei.kang@...el.com>
>> Signed-off-by: Like Xu <like.xu@...ux.intel.com>
>> ---
>>   arch/x86/include/asm/kvm_host.h | 1 +
>>   arch/x86/kvm/vmx/pmu_intel.c    | 6 +++++-
>>   2 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>> index 55efbacfc244..49b421bd3dd8 100644
>> --- a/arch/x86/include/asm/kvm_host.h
>> +++ b/arch/x86/include/asm/kvm_host.h
>> @@ -457,6 +457,7 @@ struct kvm_pmu {
>>   	unsigned nr_arch_fixed_counters;
>>   	unsigned available_event_types;
>>   	u64 fixed_ctr_ctrl;
>> +	u64 fixed_ctr_ctrl_mask;
>>   	u64 global_ctrl;
>>   	u64 global_status;
>>   	u64 global_ovf_ctrl;
>> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
>> index d9dbebe03cae..ac7fe714e6c1 100644
>> --- a/arch/x86/kvm/vmx/pmu_intel.c
>> +++ b/arch/x86/kvm/vmx/pmu_intel.c
>> @@ -400,7 +400,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>>   	case MSR_CORE_PERF_FIXED_CTR_CTRL:
>>   		if (pmu->fixed_ctr_ctrl == data)
>>   			return 0;
>> -		if (!(data & 0xfffffffffffff444ull)) {
>> +		if (!(data & pmu->fixed_ctr_ctrl_mask)) {
> Don't we already have hardware with more than 3 fixed counters?

Yes, so we update this mask based on the value of pmu->nr_arch_fixed_counters:

+    for (i = 0; i < pmu->nr_arch_fixed_counters; i++)
+        pmu->fixed_ctr_ctrl_mask &= ~(0xbull << (i * 4));

I assume this comment will not result in any code changes for this patch.