lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 19 May 2021 15:24:37 -0700
From:   "H. Peter Anvin" <hpa@...or.com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        Andy Lutomirski <luto@...nel.org>,
        Borislav Petkov <bp@...en8.de>
CC:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 1/8] x86/traps: add X86_NR_HW_TRAPS to <asm/trapnr.h>

It is not right now, but it will be used in the FRED enabling patchset at the very least (since the number of exception vectors and FIRST_EXTERNAL_VECTOR are not necessarily the same anymore.)

On May 19, 2021 3:17:57 PM PDT, Thomas Gleixner <tglx@...utronix.de> wrote:
>On Wed, May 19 2021 at 14:21, H. Peter Anvin wrote:
>> From: "H. Peter Anvin (Intel)" <hpa@...or.com>
>>
>> The x86 architecture supports up to 32 trap vectors. Add that
>constant
>> to <asm/trapnr.h>.
>
>Where is that actually used?
>
>Thanks,
>
>        tglx

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ