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Message-ID: <CAJF2gTSg0TqAzmdzf7B_xASXLO-z4yVvCDnaUV4brP7tCpCdvQ@mail.gmail.com>
Date: Wed, 19 May 2021 14:09:17 +0800
From: Guo Ren <guoren@...nel.org>
To: Christoph Hellwig <hch@....de>
Cc: Anup Patel <anup.patel@....com>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
drew@...gleboard.org, wefu@...hat.com, lazyparser@...il.com,
linux-riscv <linux-riscv@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-arch <linux-arch@...r.kernel.org>,
linux-sunxi@...ts.linux.dev, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
On Wed, May 19, 2021 at 1:55 PM Christoph Hellwig <hch@....de> wrote:
>
> On Wed, May 19, 2021 at 01:48:23PM +0800, Guo Ren wrote:
> > The patchset just leaves a configuration chance for vendors. Before
> > RISC-V ISA fixes it, we should give the chance to let vendor solve
> > their real chip issues.
>
> No. The vendors need to work to get a feature standardized before
> implementing it. There is other way to have a sane kernel build that
> supports all the different SOCs.
I've said the patchset doesn't define any features, It just leaves the
chance for vendors.
It's not in conflict with any standardized riscv ISA.
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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