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Message-ID: <CA+V-a8uNB-RyyweQ--vjdiA1NRB7_-VRYBPq9YUxFT4pFRTKBA@mail.gmail.com>
Date:   Fri, 21 May 2021 18:09:49 +0100
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH 02/16] dt-bindings: arm: renesas: Document Renesas
 RZ/G2{L,LC} SoC variants

Hi Geert,

Thank you for the review.

On Fri, May 21, 2021 at 2:23 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hii Prabhakar,
>
> On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> > Add device tree bindings documentation for Renesas RZ/G2{L,LC}
> > SoC variants.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> > Reviewed-by: Chris Paterson <Chris.Paterson2@...esas.com>
>
> > --- a/Documentation/devicetree/bindings/arm/renesas.yaml
> > +++ b/Documentation/devicetree/bindings/arm/renesas.yaml
> > @@ -308,6 +308,15 @@ properties:
> >                - renesas,r9a07g043u11 # Single Cortex-A55 RZ/G2UL
> >            - const: renesas,r9a07g043
> >
> > +      - description: RZ/G2{L,LC} (R9A07G044)
> > +        items:
> > +          - enum:
> > +              - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC
> > +              - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC
> > +              - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L
> > +              - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L
>
> Given the LSI DEVID is the same for all four, and presumably they're
> thus the same die with different packaging, do we need these four
> compatible values?
>
Yes the LSI DEVID is the same for all the above, so as to
differentiate between each SoC's, these compatible strings are added.
* For example some IP blocks which are present on RZ/G2L aren't
present in RZ/G2LC.
* Adding this to DTS gives an opportunity to stop booting if the wrong
DTB is loaded into the board.

Cheers,
Prabhakar

> > +          - const: renesas,r9a07g044
> > +
> >  additionalProperties: true
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

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