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Message-ID: <20210524120220.j73xwq7n5qbaxs4r@gilmour>
Date:   Mon, 24 May 2021 14:02:20 +0200
From:   Maxime Ripard <maxime@...no.tech>
To:     Andre Przywara <andre.przywara@....com>
Cc:     Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Rob Herring <robh@...nel.org>, Icenowy Zheng <icenowy@...c.io>,
        Samuel Holland <samuel@...lland.org>,
        Ondrej Jirman <megous@...ous.com>,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
        linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v6 14/17] arm64: dts: allwinner: Add Allwinner H616 .dtsi
 file

Hi,

On Wed, May 19, 2021 at 11:41:49AM +0100, Andre Przywara wrote:
> This (relatively) new SoC is similar to the H6, but drops the (broken)
> PCIe support and the USB 3.0 controller. It also gets the management
> controller removed, which in turn removes *some*, but not all of the
> devices formerly dedicated to the ARISC (CPUS).
> And while there is still the extra sunxi interrupt controller, the
> package lacks the corresponding NMI pin, so no interrupts for the PMIC.
> 
> USB is a bit tricky: host controller 0, 1 and 3 depend on some help from
> controller and PHY 2, so we need to include one reset line and one
> clock gate from HCI 2 into every other HCI node, plus need some nasty
> quirk.
> 
> The reserved memory node is actually handled by Trusted Firmware now,
> but U-Boot fails to propagate this to a separately loaded DTB, so we
> keep it in here for now, until U-Boot learns to do this properly.
> 
> Signed-off-by: Andre Przywara <andre.przywara@....com>

As far as I can see, the IOMMU hasn't changed between the H6 and the
H616, so it would be worth enabling

Maxime

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