lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YK9wcPtCQzUHh8jm@smile.fi.intel.com>
Date:   Thu, 27 May 2021 13:12:00 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     lakshmi.sowjanya.d@...el.com,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>, tamal.saha@...el.com
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: Add bindings for Intel Keembay
 pinctrl driver

On Thu, May 27, 2021 at 01:19:36AM +0200, Linus Walleij wrote:
> On Mon, May 24, 2021 at 11:26 AM <lakshmi.sowjanya.d@...el.com> wrote:
> 
> > From: "D, Lakshmi Sowjanya" <lakshmi.sowjanya.d@...el.com>
> >
> > Add Device Tree bindings documentation for Intel Keem Bay
> > SoC's pin controller.
> > Add entry for INTEL Keem Bay pinctrl driver in MAINTAINERS file
> >
> > Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@...el.com>
> > Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@...el.com>
> > Signed-off-by: D, Lakshmi Sowjanya <lakshmi.sowjanya.d@...el.com>
> > Acked-by: Mark Gross <mgross@...ux.intel.com>
> 
> So since this thing has device tree bindings I suppose it is one
> of those intel-but-not-x86-and-not-acpi things that Andy should
> not merge through his tree?
> 
> I bet he wants to take a look though, so keep Andy posted.

Yeah, this is the series I have reviewed couple of times internally, but then
it lost on cracks and somebody decided to submit (forgetting to include me) to
the mailing list.

In any case some points about this:
 - this is ARM based platform
 - this pin control doesn't have anything in common with x86 LPSS pin control
 - Lighting Mountain is a former MIPS-based SoC with x86 core

I.o.w. they all are different. I doubt the unification with equilibrium may
have happened.

But I think it's fine to continue the review publicly. We will see the
potential issues, maintainer's desires, etc earlier.

Btw, thanks for your preliminary review!

-- 
With Best Regards,
Andy Shevchenko


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ