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Message-ID: <CACRpkdYK8sy26_HbQE0K0snFzKs=q5zqd5e2u4HWo939FKMW6g@mail.gmail.com>
Date: Thu, 27 May 2021 12:41:49 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: lakshmi.sowjanya.d@...el.com
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
"Raja Subramanian, Lakshmi Bai"
<lakshmi.bai.raja.subramanian@...el.com>, tamal.saha@...el.com
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: Add bindings for Intel Keembay
pinctrl driver
Hi Lakshmi,
some more review of the bindings!
On Mon, May 24, 2021 at 11:26 AM <lakshmi.sowjanya.d@...el.com> wrote:
> +properties:
> + compatible:
> + const: intel,keembay-pinctrl
> +
> + reg:
> + maxItems: 2
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
The code uses "num-gpios" but should be using "ngpios" which is the
standard.
> + interrupts:
> + description:
> + Specifies the interrupt lines to be used by the controller.
> + maxItems: 8
We need to figure out how these interrupt assign to GPIOs, and it is
relevant to write that already here, om the description. It is fine if the
same info is duplicated in the driver.
> +patternProperties:
> + '^.$':
> + type: object
Certainly these nodes can have a strict name?
Use includes for checking standard attributes:
$ref: pinmux-node.yaml#
$ref: pincfg-node.yaml#
> + description:
> + Child nodes can be specified to contain pin configuration information,
> + which can then be utilized by pinctrl client devices.
> + The following properties are supported.
> +
> + properties:
> + pins:
> + description: |
> + The name(s) of the pins to be configured in the child node.
> + Supported pin names are "GPIO0" up to "GPIO79".
(...)
> + bias-disable:
> + type: boolean
Using $ref: pincfg-node.yaml# this becomes
bias-disable: true
etc.
> + drive-strength:
> + enum: [2, 4, 8, 12]
This needs to be specified though.
> + slew-rate:
> + description: |
> + 0: Fast
> + 1: Slow
> + enum: [0, 1]
And this.
Yours,
Linus Walleij
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