lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20210531181352.GZ1002214@nvidia.com>
Date:   Mon, 31 May 2021 15:13:52 -0300
From:   Jason Gunthorpe <jgg@...dia.com>
To:     David Laight <David.Laight@...LAB.COM>
Cc:     Leon Romanovsky <leon@...nel.org>,
        Doug Ledford <dledford@...hat.com>,
        Leon Romanovsky <leonro@...dia.com>,
        Avihai Horon <avihaih@...dia.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        Christoph Hellwig <hch@....de>,
        Bart Van Assche <bvanassche@....org>,
        Tom Talpey <tom@...pey.com>,
        Santosh Shilimkar <santosh.shilimkar@...cle.com>,
        Chuck Lever III <chuck.lever@...cle.com>,
        Keith Busch <kbusch@...nel.org>,
        Honggang LI <honli@...hat.com>,
        Max Gurtovoy <mgurtovoy@...dia.com>
Subject: Re: [PATCH rdma-next v1 0/2] Enable relaxed ordering for ULPs

On Thu, May 27, 2021 at 08:11:14AM +0000, David Laight wrote:
> > There was such a big discussion on the last version I wondered why
> > this was so quiet. I guess because the cc list isn't very big..
> > 
> > Adding the people from the original thread, here is the patches:
> > 
> > https://lore.kernel.org/linux-rdma/cover.1621505111.git.leonro@nvidia.com/
> > 
> > I think this is the general approach that was asked for, to special case
> > uverbs and turn it on in kernel universally
> 
> I'm still not sure which PCIe transactions you are enabling relaxed
> ordering for.  Nothing has ever said that in layman's terms.
>
> IIRC PCIe targets (like ethernet chips) can use relaxed ordered
> writes for frame contents but must use strongly ordered writes
> for the corresponding ring (control structure) updates.

Right, it is exactly like this, just not expressed in ethernet
specific terms.

Data transfer TLPs are relaxed ordered and control structure TLPs are
normal ordered.

Jason

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ