linux-kernel - RE: [PATCH rdma-next v1 0/2] Enable relaxed ordering for ULPs

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Message-ID: <2fe802bdebbd44619447c83ed7e30a74@AcuMS.aculab.com>
Date:   Mon, 31 May 2021 21:45:47 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Jason Gunthorpe' <jgg@...dia.com>
CC:     Leon Romanovsky <leon@...nel.org>,
        Doug Ledford <dledford@...hat.com>,
        Leon Romanovsky <leonro@...dia.com>,
        Avihai Horon <avihaih@...dia.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        Christoph Hellwig <hch@....de>,
        Bart Van Assche <bvanassche@....org>,
        Tom Talpey <tom@...pey.com>,
        Santosh Shilimkar <santosh.shilimkar@...cle.com>,
        "Chuck Lever III" <chuck.lever@...cle.com>,
        Keith Busch <kbusch@...nel.org>,
        "Honggang LI" <honli@...hat.com>,
        Max Gurtovoy <mgurtovoy@...dia.com>
Subject: RE: [PATCH rdma-next v1 0/2] Enable relaxed ordering for ULPs

From: Jason Gunthorpe
> Sent: 31 May 2021 19:14
> 
> On Thu, May 27, 2021 at 08:11:14AM +0000, David Laight wrote:
> > > There was such a big discussion on the last version I wondered why
> > > this was so quiet. I guess because the cc list isn't very big..
> > >
> > > Adding the people from the original thread, here is the patches:
> > >
> > > https://lore.kernel.org/linux-rdma/cover.1621505111.git.leonro@nvidia.com/
> > >
> > > I think this is the general approach that was asked for, to special case
> > > uverbs and turn it on in kernel universally
> >
> > I'm still not sure which PCIe transactions you are enabling relaxed
> > ordering for.  Nothing has ever said that in layman's terms.
> >
> > IIRC PCIe targets (like ethernet chips) can use relaxed ordered
> > writes for frame contents but must use strongly ordered writes
> > for the corresponding ring (control structure) updates.
> 
> Right, it is exactly like this, just not expressed in ethernet
> specific terms.
> 
> Data transfer TLPs are relaxed ordered and control structure TLPs are
> normal ordered.

So exactly what is this patch doing?

'Enabling relaxed ordering' sounds like something that is setting
the 'relaxed ordering' bit in TLP.
Doing that in any global fashion is clearly broken.

OTOH if it is (effectively) stopping the clearing of the 'relaxed ordering'
bit by one of the PCIe bridges (or the root complex) then it is rather
different.

	David

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