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Message-ID: <20210531214602.qd6r63s5jbr4vcm5@box>
Date:   Tue, 1 Jun 2021 00:46:02 +0300
From:   "Kirill A. Shutemov" <kirill@...temov.name>
To:     Dave Hansen <dave.hansen@...el.com>
Cc:     Sean Christopherson <seanjc@...gle.com>,
        "Kuppuswamy, Sathyanarayanan" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Andy Lutomirski <luto@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
        Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
        Raj Ashok <ashok.raj@...el.com>, linux-kernel@...r.kernel.org
Subject: Re: [RFC v2 27/32] x86/tdx: Exclude Shared bit from __PHYSICAL_MASK

On Thu, May 20, 2021 at 01:56:13PM -0700, Dave Hansen wrote:
> On 5/20/21 1:16 PM, Sean Christopherson wrote:
> > On Thu, May 20, 2021, Kuppuswamy, Sathyanarayanan wrote:
> >> So what is your proposal? "tdx_guest_" / "tdx_host_" ?
> >   1. Abstract things where appropriate, e.g. I'm guessing there is a clever way
> >      to deal with the shared vs. private inversion and avoid tdg_shared_mask
> >      altogether.
> 
> One example here would be to keep a structure like:
> 
> struct protected_mem_config
> {
> 	unsigned long p_set_bits;
> 	unsigned long p_clear_bits;
> }
> 
> Where 'p_set_bits' are the bits that need to be set to establish memory
> protection and 'p_clear_bits' are the bits that need to be cleared.
> physical_mask would clear both of them:
> 
> 	physical_mask &= ~(pmc.p_set_bits & pmc.p_set_bits);

For me it looks like an abstraction for sake of abstraction. More levels
of indirection without clear benefit. It doesn't add any more readability:
would you know what 'p_set_bits' stands for in two month? I'm not sure.

I would rather leave explicit check for protection flavour. It provides
better context for a reader.

-- 
 Kirill A. Shutemov

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