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Message-ID: <6fb69565f7b27eb7e8ee3321624ad624@walle.cc>
Date: Tue, 01 Jun 2021 14:44:57 +0200
From: Michael Walle <michael@...le.cc>
To: Pratyush Yadav <p.yadav@...com>
Cc: Tudor Ambarus <tudor.ambarus@...rochip.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Mark Brown <broonie@...nel.org>, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org
Subject: Re: [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address
writes in 8D-8D-8D mode
Am 2021-05-31 20:17, schrieb Pratyush Yadav:
> On Octal DTR capable flashes like Micron Xcella the writes cannot start
> or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be
> appended or prepended to make sure the start address and end address
> are
> even. 0xff is used because on NOR flashes a program operation can only
> flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to
> happen via erases.
>
> Signed-off-by: Pratyush Yadav <p.yadav@...com>
Reviewed-by: Michael Walle <michael@...le.cc>
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