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Message-ID: <CAHp75VcPdUeK49w9qg9RuJY7ASMyFMEEi=cX1gnp=wM_QHDZ+w@mail.gmail.com>
Date: Thu, 3 Jun 2021 14:07:28 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Steven Lee <steven_lee@...eedtech.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@...ts.ozlabs.org>,
open list <linux-kernel@...r.kernel.org>, Hongweiz@....com,
ryan_chen@...eedtech.com, Billy Tsai <billy_tsai@...eedtech.com>
Subject: Re: [PATCH v3 4/5] gpio: gpio-aspeed-sgpio: Add set_config function
On Thu, Jun 3, 2021 at 1:20 PM Steven Lee <steven_lee@...eedtech.com> wrote:
>
> AST SoC supports *retain pin state* function when wdt reset.
> The patch adds set_config function for handling sgpio reset tolerance
> register.
...
> +static int aspeed_sgpio_set_config(struct gpio_chip *chip, unsigned int offset,
> + unsigned long config)
> +{
> + unsigned long param = pinconf_to_config_param(config);
> + u32 arg = pinconf_to_config_argument(config);
> +
> + if (param == PIN_CONFIG_PERSIST_STATE)
> + return aspeed_sgpio_reset_tolerance(chip, offset, arg);
> + else
Redundant.
> + return -EOPNOTSUPP;
IIRC we are using ENOTSUPP internally in the kernel. YEs, checkpatch
warning may be ignored.
> +}
--
With Best Regards,
Andy Shevchenko
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