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Message-ID: <df76ecd3748a055085fe62f3119eaebc7f2c16bd.camel@pengutronix.de>
Date: Mon, 07 Jun 2021 11:23:12 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Robert Marko <robert.marko@...tura.hr>, linus.walleij@...aro.org,
bgolaszewski@...libre.com, robh+dt@...nel.org,
lee.jones@...aro.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: luka.perkov@...tura.hr, jmp@...phyte.org, pmenzel@...gen.mpg.de,
buczek@...gen.mpg.de
Subject: Re: [PATCH v4 4/6] reset: Add Delta TN48M CPLD reset controller
Hi Robert,
On Wed, 2021-06-02 at 14:24 +0200, Robert Marko wrote:
> Delta TN48M CPLD exposes resets for the following:
> * 88F7040 SoC
> * 88F6820 SoC
> * 98DX3265 switch MAC-s
> * 88E1680 PHY-s
> * 88E1512 PHY
> * PoE PSE controller
>
> Controller supports only self clearing resets.
>
> Signed-off-by: Robert Marko <robert.marko@...tura.hr>
> ---
> drivers/reset/Kconfig | 9 +++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-tn48m.c | 128 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 138 insertions(+)
> create mode 100644 drivers/reset/reset-tn48m.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 4171c6f76385..14e179cda58c 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -237,6 +237,15 @@ config RESET_TI_SYSCON
> you wish to use the reset framework for such memory-mapped devices,
> say Y here. Otherwise, say N.
>
> +config RESET_TN48M_CPLD
> + tristate "Delta Networks TN48M switch CPLD reset controller"
> + depends on MFD_TN48M_CPLD
Let's make this
depends on MFD_TN48M_CPLD || COMPILE_TEST
default MFD_TN48M_CPLD
unless there is a reason not to enable the reset driver by default when
the MFD driver is activated.
Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
regards
Philipp
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