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Message-ID: <ecda9dff011e4d9cb53186da1bc2ba40@codeaurora.org>
Date: Tue, 08 Jun 2021 13:40:15 +0530
From: rojay@...eaurora.org
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: agross@...nel.org, robh+dt@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Rajendra Nayak <rnayak@...eaurora.org>,
saiprakash.ranjan@...eaurora.org, msavaliy@....qualcomm.com
Subject: Re: [PATCH V3 3/3] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes
On 2021-06-06 09:23, Bjorn Andersson wrote:
> On Fri 04 Jun 08:54 CDT 2021, Roja Rani Yarubandi wrote:
>
>> Add QUPv3 wrapper_1 DT nodes for SC7280 SoC.
>>
>> Signed-off-by: Roja Rani Yarubandi <rojay@...eaurora.org>
>> ---
>> Changes in V3:
>> - Broken the huge V2 patch into 3 smaller patches.
>> 1. QSPI DT nodes
>> 2. QUP wrapper_0 DT nodes
>> 3. QUP wrapper_1 DT nodes
>>
>> Changes in V2:
>> - As per Doug's comments removed pinmux/pinconf subnodes.
>> - As per Doug's comments split of SPI, UART nodes has been done.
>> - Moved QSPI node before aps_smmu as per the order.
>>
>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 +
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 751
>> ++++++++++++++++++++++++
>> 2 files changed, 755 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index f57458dbe763..bdea9bf4eeca 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -288,6 +288,10 @@ &qupv3_id_0 {
>> status = "okay";
>> };
>>
>> +&qupv3_id_1 {
>> + status = "okay";
>> +};
>> +
>> &uart5 {
>> status = "okay";
>> };
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index b783f5622a66..348a34f3448e 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -881,6 +881,437 @@ uart7: serial@...000 {
>> };
>> };
>>
>> + qupv3_id_1: geniqup@...000 {
>> + compatible = "qcom,geni-se-qup";
>> + reg = <0 0x00ac0000 0 0x2000>;
>> + clock-names = "m-ahb", "s-ahb";
>> + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
>> + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> + iommus = <&apps_smmu 0x43 0x0>;
>> + interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt
>> SLAVE_QUP_CORE_1 0>;
>> + interconnect-names = "qup-core";
>
> We used to have interconnect votes for the wrapper, but I recently
> merged patches that dropped these for sc7180, so please conclude which
> way this should be.
>
> The rest looks good.
>
> Regards,
> Bjorn
Sorry, forgot to remove interconnect votes here for both the wrappers.
I will correct this in the follow up patch.
Thanks,
Roja
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