[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d21d2a2f579824899b3219b2620b6d1d@codeaurora.org>
Date: Tue, 08 Jun 2021 13:46:32 +0530
From: rojay@...eaurora.org
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: agross@...nel.org, robh+dt@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Rajendra Nayak <rnayak@...eaurora.org>,
saiprakash.ranjan@...eaurora.org, msavaliy@....qualcomm.com
Subject: Re: [PATCH V3 2/3] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes
On 2021-06-06 09:19, Bjorn Andersson wrote:
> On Fri 04 Jun 08:54 CDT 2021, Roja Rani Yarubandi wrote:
>
>> Add QUPv3 wrapper_0 DT nodes for SC7280 SoC.
>>
>> Signed-off-by: Roja Rani Yarubandi <rojay@...eaurora.org>
>> ---
>> Changes in V3:
>> - Broken the huge V2 patch into 3 smaller patches.
>> 1. QSPI DT nodes
>> 2. QUP wrapper_0 DT nodes
>> 3. QUP wrapper_1 DT nodes
>>
>> Changes in V2:
>> - As per Doug's comments removed pinmux/pinconf subnodes.
>> - As per Doug's comments split of SPI, UART nodes has been done.
>> - Moved QSPI node before aps_smmu as per the order.
>>
>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 97 ++-
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 750
>> +++++++++++++++++++++++-
>> 2 files changed, 835 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index d0edffc15736..f57458dbe763 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -292,6 +292,16 @@ &uart5 {
>> status = "okay";
>> };
>>
>> +&uart7 {
>> + status = "okay";
>> +
>> + /delete-property/interrupts;
>> + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
>> + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>,
>> <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
>> +};
>> +
>> /* PINCTRL - additions to nodes defined in sc7280.dtsi */
>>
>> &qspi_cs0 {
>> @@ -307,16 +317,87 @@ &qspi_data01 {
>> bias-pull-up;
>> };
>>
>> -&qup_uart5_default {
>> - tx {
>> - pins = "gpio46";
>
> Commit message says "add stuff", but somehow uart5 is no longer
> gpio46/47 and these gpios are no longer specified.
>
> Can you roll this in a way where the giant patch actually _only_ adds
> a whole bunch of stuff?
>
>> - drive-strength = <2>;
>> - bias-disable;
>> +&qup_uart5_tx {
>> + drive-strength = <2>;
>> + bias-disable;
>> +};
>> +
>
> Regards,
> Bjorn
Okay, so shall I split this 2/3rd patch into two with
one patch modifying uart5 node and the other one with
_only_ adds rest all nodes?
Thanks,
Roja
Powered by blists - more mailing lists