lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAPDyKFr-vuP_bdG-iFjJyS3ZeVDiVq+3aVERHjBo-8BHf38m9g@mail.gmail.com>
Date:   Tue, 8 Jun 2021 14:52:33 +0200
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     rashmi.a@...el.com, Kishon <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>
Cc:     Michal Simek <michal.simek@...inx.com>,
        linux-mmc <linux-mmc@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        linux-phy@...ts.infradead.org,
        Adrian Hunter <adrian.hunter@...el.com>
Subject: Re: [“PATCH” 2/2] phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP

On Thu, 3 Jun 2021 at 20:22, <rashmi.a@...el.com> wrote:
>
> From: Rashmi A <rashmi.a@...el.com>
>
> Since the EMMC clock was changed from 200Mhz to 175Mhz in FIP,
> there were some warnings introduced, as the frequency values
> being checked was still wrt 200Mhz in code. Hence, the frequency
> checks are now updated based on the current 175Mhz EMMC clock changed
> in FIP.
>
> Spamming kernel log msg:
> "phy phy-20290000.mmc_phy.2: Unsupported rate: 43750000"
>
> Signed-off-by: Rashmi A <rashmi.a@...el.com>
> Reviewed-by: Adrian Hunter <adrian.hunter@...el.com>

I guess $subject patch should be queued together with patch1/2 (via
the mmc tree?), no?

Vinod, Kishion, if that's okay I need an ack from you to pick it up.

Kind regards
Uffe

> ---
>  drivers/phy/intel/phy-intel-keembay-emmc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/phy/intel/phy-intel-keembay-emmc.c b/drivers/phy/intel/phy-intel-keembay-emmc.c
> index eb7c635ed89a..0eb11ac7c2e2 100644
> --- a/drivers/phy/intel/phy-intel-keembay-emmc.c
> +++ b/drivers/phy/intel/phy-intel-keembay-emmc.c
> @@ -95,7 +95,8 @@ static int keembay_emmc_phy_power(struct phy *phy, bool on_off)
>         else
>                 freqsel = 0x0;
>
> -       if (mhz < 50 || mhz > 200)
> +       /* Check for EMMC clock rate*/
> +       if (mhz > 175)
>                 dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz);
>
>         /*
> --
> 2.17.1
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ