linux-kernel - Re: [PATCH v2 rdma-next] RDMA/mlx5: Enable Relaxed Ordering by default for kernel ULPs

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Message-ID: <20210609150922.GA1109697@nvidia.com>
Date:   Wed, 9 Jun 2021 12:09:22 -0300
From:   Jason Gunthorpe <jgg@...dia.com>
To:     David Laight <David.Laight@...LAB.COM>
Cc:     'Chuck Lever III' <chuck.lever@...cle.com>,
        Christoph Hellwig <hch@....de>,
        Leon Romanovsky <leon@...nel.org>,
        Doug Ledford <dledford@...hat.com>,
        Avihai Horon <avihaih@...dia.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        Bart Van Assche <bvanassche@....org>,
        Tom Talpey <tom@...pey.com>,
        Santosh Shilimkar <santosh.shilimkar@...cle.com>,
        Keith Busch <kbusch@...nel.org>,
        Honggang LI <honli@...hat.com>,
        Max Gurtovoy <mgurtovoy@...dia.com>
Subject: Re: [PATCH v2 rdma-next] RDMA/mlx5: Enable Relaxed Ordering by
 default for kernel ULPs

On Wed, Jun 09, 2021 at 03:05:52PM +0000, David Laight wrote:

> In principle some writel() could generate PCIe write TLP (going
> to the target) that have the 'relaxed ordering' bit set.

In Linux we call this writel_relaxed(), though I know of no
implementation that sets the RO bit in the TLP based on this, it would
be semantically correct to do so.

writel() has strong order requirements and must not generate a RO TLP.

Jason