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Message-ID: <YMCRMeckadaRw3gI@kroah.com>
Date:   Wed, 9 Jun 2021 12:00:17 +0200
From:   Greg KH <gregkh@...uxfoundation.org>
To:     trix@...hat.com
Cc:     mdf@...nel.org, fpacheco@...hat.com, linux-fpga@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 7/7] fpga: altera: remove altera- prefix on files

On Tue, Jun 08, 2021 at 09:26:23AM -0700, trix@...hat.com wrote:
> From: Tom Rix <trix@...hat.com>
> 
> It is not necessary to have an altera- prefix on a file
> when the file is in an altera/ subdir.
> 
> Signed-off-by: Tom Rix <trix@...hat.com>
> ---
>  drivers/fpga/altera/Makefile                         | 12 ++++++------
>  drivers/fpga/altera/{altera-cvp.c => cvp.c}          |  0
>  .../altera/{altera-fpga2sdram.c => fpga2sdram.c}     |  0
>  .../{altera-freeze-bridge.c => freeze-bridge.c}      |  0
>  .../fpga/altera/{altera-hps2fpga.c => hps2fpga.c}    |  0
>  .../{altera-pr-ip-core-plat.c => pr-ip-core-plat.c}  |  0
>  .../altera/{altera-pr-ip-core.c => pr-ip-core.c}     |  0
>  drivers/fpga/altera/{altera-ps-spi.c => ps-spi.c}    |  0
>  8 files changed, 6 insertions(+), 6 deletions(-)
>  rename drivers/fpga/altera/{altera-cvp.c => cvp.c} (100%)
>  rename drivers/fpga/altera/{altera-fpga2sdram.c => fpga2sdram.c} (100%)
>  rename drivers/fpga/altera/{altera-freeze-bridge.c => freeze-bridge.c} (100%)
>  rename drivers/fpga/altera/{altera-hps2fpga.c => hps2fpga.c} (100%)
>  rename drivers/fpga/altera/{altera-pr-ip-core-plat.c => pr-ip-core-plat.c} (100%)
>  rename drivers/fpga/altera/{altera-pr-ip-core.c => pr-ip-core.c} (100%)
>  rename drivers/fpga/altera/{altera-ps-spi.c => ps-spi.c} (100%)
> 
> diff --git a/drivers/fpga/altera/Makefile b/drivers/fpga/altera/Makefile
> index 4d725c72fcbef..c2d626cd1f540 100644
> --- a/drivers/fpga/altera/Makefile
> +++ b/drivers/fpga/altera/Makefile
> @@ -1,12 +1,12 @@
>  # SPDX-License-Identifier: GPL-2.0
>  
> -obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
> -obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
> -obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
> -obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
> -obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
> +obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += freeze-bridge.o
> +obj-$(CONFIG_ALTERA_PR_IP_CORE) += pr-ip-core.o
> +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += pr-ip-core-plat.o
> +obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += cvp.o
> +obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += ps-spi.o
>  obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
>  obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
>  obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
>  obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
> -obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
> +obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += hps2fpga.o fpga2sdram.o

Same issue here, you are renaming the resulting module for no good
reason.  Please never do that unless you mean to, AND, you document why
you are doing so in the changelog text.

thanks,

greg k-h

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