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Message-ID: <20210615173233.26682-26-tinghan.shen@mediatek.com>
Date: Wed, 16 Jun 2021 01:32:32 +0800
From: Tinghan Shen <tinghan.shen@...iatek.com>
To: <robh+dt@...nel.org>, <matthias.bgg@...il.com>
CC: <devicetree@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <srv_heupstream@...iatek.com>,
<seiya.wang@...iatek.com>, <wenst@...gle.com>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Tinghan Shen <tinghan.shen@...iatek.com>
Subject: [PATCH 26/27] arm64: dts: mt8195: add scp device node
add scp node for mt8195
Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index a98609989905..25a6ee7c6659 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -787,6 +787,16 @@
status = "disabled";
};
+ scp: scp@...00000 {
+ compatible = "mediatek,mt8195-scp";
+ reg = <0 0x10500000 0 0x100000>,
+ <0 0x10700000 0 0x8000>,
+ <0 0x10720000 0 0xe0000>;
+ reg-names = "sram", "l1tcm", "cfg";
+ interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
+ status = "okay";
+ };
+
scp_adsp: syscon@...20000 {
compatible = "mediatek,mt8195-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
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