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Date:   Tue, 15 Jun 2021 16:20:41 -0700
From:   Dan Williams <dan.j.williams@...el.com>
To:     linux-cxl@...r.kernel.org
Cc:     Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux NVDIMM <nvdimm@...ts.linux.dev>
Subject: Re: [PATCH v2 0/5] cxl/pmem: Add core infrastructure for PMEM support

On Tue, Jun 15, 2021 at 4:18 PM Dan Williams <dan.j.williams@...el.com> wrote:
>
> Changes since v1 [1]:

Neglected the v1 link:

https://lore.kernel.org/r/162336395765.2462439.11368504490069925374.stgit@dwillia2-desk3.amr.corp.intel.com

> - cleanup @flush determination in unregister_nvb() (Jonathan)
> - cleanup online_nvdimm_bus() to return a status code (Jonathan)
> - drop unnecessary header includes (Jonathan)
> - drop unused cxl_nvdimm driver data (Jonathan)
> - rename the bus to be unregistered as @victim_bus in
>   cxl_nvb_update_state() (Jonathan)
> - miscellaneous cleanups and pick up reviewed-by's (Jonathan)
>
> ---
>
> CXL Memory Expander devices (CXL 2.0 Type-3) support persistent memory
> in addition to volatile memory expansion. The most significant changes
> this requires of the existing LIBNVDIMM infrastructure, compared to what
> was needed to support ACPI NFIT defined PMEM, is the ability to
> dynamically provision regions in addition to namespaces, and a formal
> model for hotplug.
>
> Before region provisioning can be added the CXL enabling needs to
> enumerate "nvdimm" devices on a CXL nvdimm-bus. This is modeled as a
> CXL-nvdimm-bridge device (bridging CXL to nvdimm) and an associated
> driver to activate and deactivate that bus-bridge. Once the bridge is
> registered it scans for CXL nvdimm devices registered by endpoints.  The
> CXL core bus is used as a rendezvous for nvdimm bridges and endpoints
> allowing them to be registered and enabled in any order.
>
> At the end of this series the ndctl utility can see CXL nvdimm resources
> just like any other nvdimm bus.
>
>     # ndctl list -BDiu -b CXL
>     {
>       "provider":"CXL",
>       "dev":"ndbus1",
>       "dimms":[
>         {
>           "dev":"nmem1",
>           "state":"disabled"
>         },
>         {
>           "dev":"nmem0",
>           "state":"disabled"
>         }
>       ]
>     }
>
> Follow-on patches extend the nvdimm core label support for CXL region
> and namespace labels. For now just add the machinery to register the
> bus and nvdimm base objects.
>
> ---
>
> Dan Williams (5):
>       cxl/core: Add cxl-bus driver infrastructure
>       cxl/pmem: Add initial infrastructure for pmem support
>       libnvdimm: Export nvdimm shutdown helper, nvdimm_delete()
>       libnvdimm: Drop unused device power management support
>       cxl/pmem: Register 'pmem' / cxl_nvdimm devices
>
>
>  drivers/cxl/Kconfig        |   13 ++
>  drivers/cxl/Makefile       |    2
>  drivers/cxl/acpi.c         |   37 ++++++
>  drivers/cxl/core.c         |  280 ++++++++++++++++++++++++++++++++++++++++++++
>  drivers/cxl/cxl.h          |   56 +++++++++
>  drivers/cxl/mem.h          |    1
>  drivers/cxl/pci.c          |   23 +++-
>  drivers/cxl/pmem.c         |  230 ++++++++++++++++++++++++++++++++++++
>  drivers/nvdimm/bus.c       |   64 ++++++----
>  drivers/nvdimm/dimm_devs.c |   18 +++
>  include/linux/libnvdimm.h  |    1
>  11 files changed, 694 insertions(+), 31 deletions(-)
>  create mode 100644 drivers/cxl/pmem.c
>
> base-commit: 87815ee9d0060a91bdf18266e42837a9adb5972e

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