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Message-ID: <cba788c2-f826-94f0-0bcd-bae491ac4189@somainline.org>
Date: Fri, 18 Jun 2021 00:34:24 +0200
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Bhupesh Sharma <bhupesh.sharma@...aro.org>,
linux-arm-msm@...r.kernel.org
Cc: bhupesh.linux@...il.com, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
robh+dt@...nel.org, agross@...nel.org,
Mark Brown <broonie@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Subject: Re: [PATCH v3 3/5] arm64: dts: qcom: pmm8155au_1: Add base dts file
On 17.06.2021 07:45, Bhupesh Sharma wrote:
> Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc
> nodes.
>
> Cc: Mark Brown <broonie@...nel.org>
> Cc: Vinod Koul <vkoul@...nel.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++
> 1 file changed, 134 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> new file mode 100644
> index 000000000000..b04c28e54470
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> @@ -0,0 +1,134 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, Linaro Limited
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> +
> +/ {
> + thermal-zones {
> + pmm8155au-1-thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&pmm8155au_1_temp>;
> +
> + trips {
> + trip0 {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "passive";
> + };
> +
> + trip1 {
> + temperature = <115000>;
> + hysteresis = <0>;
> + type = "hot";
> + };
> +
> + trip2 {
> + temperature = <145000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + };
> + };
> +};
> +
> +&spmi_bus {
> + pmic@0 {
> + compatible = "qcom,pmm8155au", "qcom,spmi-pmic";
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pon: power-on@800 {
> + compatible = "qcom,pm8916-pon";
> + reg = <0x0800>;
> + pwrkey {
> + compatible = "qcom,pm8941-pwrkey";
> + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
> + debounce = <15625>;
> + bias-pull-up;
> + linux,code = <KEY_POWER>;
> +
> + status = "disabled";
> + };
Oh, okay, so the power key is there, then I withdraw my worries from _2.
I'm still interested in the reg situation though.
> + };
> +
> + pmm8155au_1_temp: temp-alarm@...0 {
> + compatible = "qcom,spmi-temp-alarm";
> + reg = <0x2400>;
> + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
> + io-channels = <&pmm8155au_1_adc ADC5_DIE_TEMP>;
> + io-channel-names = "thermal";
> + #thermal-sensor-cells = <0>;
> + };
> +
> + pmm8155au_1_adc: adc@...0 {
> + compatible = "qcom,spmi-adc5";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + die-temp@6 {
> + reg = <ADC5_DIE_TEMP>;
> + qcom,pre-scaling = <1 1>;
> + label = "die_temp";
> + };
> + };
> +
> + pmm8155au_1_adc_tm: adc-tm@...0 {
> + compatible = "qcom,spmi-adc-tm5";
> + reg = <0x3500>;
> + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
> + #thermal-sensor-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + pmm8155au_1_rtc: rtc@...0 {
> + compatible = "qcom,pm8941-rtc";
> + reg = <0x6000>;
> + reg-names = "rtc", "alarm";
> + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> +
> + status = "disabled";
> + };
> +
> + pmm8155au_1_gpios: gpio@...0 {
> + compatible = "qcom,pmm8155au-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
And the same question about gpio-ranges from _2.
> + };
> +
> + pmic@1 {
> + compatible = "qcom,pmm8155au", "qcom,spmi-pmic";
> + reg = <0x1 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +};
>
Konrad
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