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Message-ID: <CAFBinCC0KScn6cJ36ZB_=TRncOOCXJHWwR3s=o3TobH=yOrGJA@mail.gmail.com>
Date: Fri, 18 Jun 2021 00:37:02 +0200
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: Anand Moon <linux.amoon@...il.com>
Cc: Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Neil Armstrong <narmstrong@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-phy@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [RFCv1 7/8] phy: amlogic: meson8b-usb2: Power off the PHY by
putting it into reset mode.
Hi Anand,
On Thu, Jun 17, 2021 at 9:44 PM Anand Moon <linux.amoon@...il.com> wrote:
[...]
> @@ -245,8 +250,6 @@ static int phy_meson8b_usb2_power_on(struct phy *phy)
> regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK,
> 0x5 << REG_CTRL_FSEL_SHIFT);
> /* reset the PHY */
> - regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,
> - REG_CTRL_POWER_ON_RESET);
The vendor driver uses the following sequence for the power on reset:
- set the power on reset bit
- wait 500us
- clear the power on reset bit
- wait 500us
With your change we now:
- wait 500us
- clear the power on reset bit
- wait 500us
I don't know if this is sufficient to bring the PHY into a well-defined state.
Maybe it works, maybe it doesn't reset at all in this case - I don't
know how to verify this though.
Best regards,
Martin
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