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Message-Id: <20210618205533.1527384-6-clabbe@baylibre.com>
Date: Fri, 18 Jun 2021 20:55:33 +0000
From: Corentin Labbe <clabbe@...libre.com>
To: arnd@...db.de, linus.walleij@...aro.org, olof@...om.net,
robh+dt@...nel.org, soc@...nel.org, ulli.kroll@...glemail.com
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Corentin Labbe <clabbe@...libre.com>
Subject: [PATCH v2 5/5] ARM: gemini: add device tree for ssi1328
The SSI 1328 is a NAS box running a SL3516 SoC.
Signed-off-by: Corentin Labbe <clabbe@...libre.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/gemini-ssi1328.dts | 138 +++++++++++++++++++++++++++
2 files changed, 139 insertions(+)
create mode 100644 arch/arm/boot/dts/gemini-ssi1328.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 806715f3266d..49bf7af72111 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -221,6 +221,7 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-rut1xx.dtb \
gemini-sl93512r.dtb \
gemini-sq201.dtb \
+ gemini-ssi1328.dtb \
gemini-wbd111.dtb \
gemini-wbd222.dtb
dtb-$(CONFIG_ARCH_HI3xxx) += \
diff --git a/arch/arm/boot/dts/gemini-ssi1328.dts b/arch/arm/boot/dts/gemini-ssi1328.dts
new file mode 100644
index 000000000000..2b3e7db84fed
--- /dev/null
+++ b/arch/arm/boot/dts/gemini-ssi1328.dts
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Corentin Labbe <clabbe@...libre.com>
+ * Device Tree file for SSI 1328
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+
+/ {
+ model = "SSI 1328";
+ compatible = "ssi,1328", "cortina,gemini";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 {
+ /* 128 MB */
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>;
+ };
+
+ aliases {
+ mdio-gpio0 = &mdio0;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M";
+ stdout-path = &uart0;
+ };
+
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* LAN Marvell 88E1118 */
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ /* We lack the knowledge of necessary GPIO to achieve
+ * Gigabit
+ */
+ max-speed = <100>;
+ };
+ /* WAN ICPlus IP101A */
+ phy1: ethernet-phy@2 {
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ };
+};
+
+ðernet {
+ status = "okay";
+ ethernet-port@0 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet-port@1 {
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+};
+
+&flash {
+ status = "okay";
+ /* 32MB of flash */
+ reg = <0x30000000 0x03200000>;
+
+ pinctrl-names = "enabled", "disabled";
+ pinctrl-0 = <&pflash_default_pins>;
+ pinctrl-1 = <&pflash_disabled_pins>;
+
+ partitions {
+ compatible = "redboot-fis";
+ /* Eraseblock at 0xfe0000 */
+ fis-index-block = <0x7F>;
+ };
+};
+
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_default_pins>;
+};
+
+&ide0 {
+ status = "okay";
+};
+
+&ide1 {
+ status = "okay";
+};
+
+&sata {
+ cortina,gemini-ata-muxmode = <0>;
+ cortina,gemini-enable-sata-bridge;
+ status = "okay";
+};
+
+&syscon {
+ pinctrl {
+ /*
+ * gpio0agrp cover line 0-4
+ * gpio0bgrp cover line 5
+ */
+ gpio0_default_pins: pinctrl-gpio0 {
+ mux {
+ function = "gpio0";
+ groups = "gpio0agrp", "gpio0bgrp";
+ };
+ };
+ pflash_disabled_pins: pinctrl-pflash-disabled {
+ mux {
+ function = "gpio0";
+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+ "gpio0kgrp";
+ };
+ };
+ pinctrl-gmii {
+ /* This platform use both the ethernet ports */
+ mux {
+ function = "gmii";
+ groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
+ };
+ };
+ };
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
--
2.31.1
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