linux-kernel - Re: [PATCH v3 7/9] KVM: VMX: Add guest physical address check in EPT violation and misconfig

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Message-ID: <CALMp9eRWa+SryhQUzSzjiN=PPwtd8JWheYJU67JUQLMcBY9UMQ@mail.gmail.com>
Date:   Mon, 21 Jun 2021 11:31:15 -0700
From:   Jim Mattson <jmattson@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Mohammed Gamal <mgamal@...hat.com>, kvm list <kvm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Joerg Roedel <joro@...tes.org>,
        Aaron Lewis <aaronlewis@...gle.com>,
        Sean Christopherson <seanjc@...gle.com>
Subject: Re: [PATCH v3 7/9] KVM: VMX: Add guest physical address check in EPT
 violation and misconfig

On Wed, Jan 27, 2021 at 12:57 PM Jim Mattson <jmattson@...gle.com> wrote:
>
> On Wed, Jan 20, 2021 at 1:16 PM Jim Mattson <jmattson@...gle.com> wrote:
> >
> > On Fri, Jan 15, 2021 at 11:35 AM Jim Mattson <jmattson@...gle.com> wrote:
> > >
> > > On Fri, Oct 23, 2020 at 10:43 AM Paolo Bonzini <pbonzini@...hat.com> wrote:
> > > >
> > > > On 23/10/20 19:23, Jim Mattson wrote:
> > > > >> The information that we need is _not_ that provided by the advanced
> > > > >> VM-exit information (or by a page walk).  If a page is neither writable
> > > > >> nor executable, the advanced information doesn't say if the injected #PF
> > > > >> should be a W=1 or a F=1 fault.  We need the information in bits 0..2 of
> > > > >> the exit qualification for the final access, which however is not
> > > > >> available for the paging-structure access.
> > > > >>
> > > > > Are you planning to extend the emulator, then, to support all
> > > > > instructions? I'm not sure where you are going with this.
> > > >
> > > > I'm going to fix the bit 8=1 case, but for bit 8=0 there's not much that
> > > > you can do.  In all likelihood the guest is buggy anyway.
> > >
> > > Did this drop off your radar? Are you still planning to fix the bit8=1
> > > case to use advanced EPT exit qualification information? Or did I just
> > > miss it?
> >
> > Paolo,
> > If you're not working on this, do you mind if I ask Aaron to take a look at it?
>
> Ugh. The advanced EPT exit qualification contains nothing useful here,
> AFAICT. It only contains x86 page protection information--nothing
> about the access itself.

BTW, I don't think this patch is complete. In particular, L0 needs to
take first crack at any L2 #PF intercepts for present, not-reserved
faults, to see if it needs to set the RSVD flag in the error code.