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Message-ID: <95fb8ea3-f409-55ee-6b5c-f19858dd0fab@samsung.com>
Date:   Mon, 21 Jun 2021 12:17:41 +0200
From:   Marek Szyprowski <m.szyprowski@...sung.com>
To:     Daniel Lezcano <daniel.lezcano@...aro.org>,
        Will Deacon <will@...nel.org>,
        Chanwoo Choi <cw00.choi@...sung.com>
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 1/2] clocksource/drivers/exynos_mct: Prioritise Arm arch
 timer on arm64

Hi Daniel,

On 21.06.2021 11:25, Daniel Lezcano wrote:
> On 17/06/2021 23:47, Will Deacon wrote:
>> On Thu, Jun 17, 2021 at 09:58:35AM +0900, Chanwoo Choi wrote:
>>> On 6/17/21 12:25 AM, Daniel Lezcano wrote:
>>>> On 10/06/2021 03:03, Chanwoo Choi wrote:
>>>>> On 6/9/21 12:43 AM, Will Deacon wrote:
>>>>>> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
>>>>>> index fabad79baafc..804d3e01c8f4 100644
>>>>>> --- a/drivers/clocksource/exynos_mct.c
>>>>>> +++ b/drivers/clocksource/exynos_mct.c
>>>>>> @@ -51,6 +51,15 @@
>>>>>>   
>>>>>>   #define TICK_BASE_CNT	1
>>>>>>   
>>>>>> +#ifdef CONFIG_ARM
>>>>>> +/* Use values higher than ARM arch timer. See 6282edb72bed. */
>>>>>> +#define MCT_CLKSOURCE_RATING		450
>>>>>> +#define MCT_CLKEVENTS_RATING		500
>>>>>> +#else
>>>>>> +#define MCT_CLKSOURCE_RATING		350
>>>>>> +#define MCT_CLKEVENTS_RATING		350
>>>>>> +#endif
>>>>>> +
>>>>>>   enum {
>>>>>>   	MCT_INT_SPI,
>>>>>>   	MCT_INT_PPI
>>>>>> @@ -206,7 +215,7 @@ static void exynos4_frc_resume(struct clocksource *cs)
>>>>>>   
>>>>>>   static struct clocksource mct_frc = {
>>>>>>   	.name		= "mct-frc",
>>>>>> -	.rating		= 450,	/* use value higher than ARM arch timer */
>>>>>> +	.rating		= MCT_CLKSOURCE_RATING,
>>>>>>   	.read		= exynos4_frc_read,
>>>>>>   	.mask		= CLOCKSOURCE_MASK(32),
>>>>>>   	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
>>>>>> @@ -457,7 +466,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu)
>>>>>>   	evt->set_state_oneshot_stopped = set_state_shutdown;
>>>>>>   	evt->tick_resume = set_state_shutdown;
>>>>>>   	evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
>>>>>> -	evt->rating = 500;	/* use value higher than ARM arch timer */
>>>>>> +	evt->rating = MCT_CLKEVENTS_RATING,
>>>>>>   
>>>>>>   	exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
>>>>>>   
>>>>>>
>>>>> I'm not sure that exynos mct is working without problem
>>>>> such as the case of 6282edb72bed.
>>>>> As described on On ,6282edb72bed the arch timer on exynos SoC
>>>>> depends on Exynos MCT device. the arch timer is not able to work
>>>>> without Exynos MCT because of using the common module.
>>>> Is it possible to change the DT to have a phandle to the exynos_mct, so
>>>> it will be probed before the arch_arm_timer ?
>>> I think that DT changes is not proper way to keep the order between
>>> exynos_mct and arch timer.
>> exynos4_mct_frc_start() is called unconditionally from probe via
>> exynos4_clocksource_init() so as long as the mct probes first, then the
>> arch timer should work, no? The rating shouldn't affect that.
> How do you ensure the exynos mct is probed before the arch timer ?
>
> The Makefile provides the right order, but the dependency is implicit.

In my test systems based on Exynos5433, the bootloader enabled MCT, so 
kernel can also start with arch_timer then switch to MCT. The probe 
order also depend on the order of DT nodes, so with the current dts MCT 
is probed first. This is not the best approach, but so far it works.

Best regards

-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

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