[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1624347445-88070-1-git-send-email-zhouyanjie@wanyeetech.com>
Date: Tue, 22 Jun 2021 15:37:21 +0800
From: 周琰杰 (Zhou Yanjie)
<zhouyanjie@...yeetech.com>
To: tsbogend@...ha.franken.de, paul@...pouillou.net, robh+dt@...nel.org
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, dongsheng.qiu@...enic.com,
aric.pzqi@...enic.com, rick.tyliu@...enic.com,
sihui.liu@...enic.com, jun.jiang@...enic.com,
sernia.zhou@...mail.com
Subject: [PATCH 0/4] Misc Ingenic patches.
Some misc patches that don't really have any relation
between themselves.
周琰杰 (Zhou Yanjie) (4):
MIPS: X1830: Respect cell count of common properties.
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
MIPS: GCW0: Adjust pinctrl related code in device tree.
MIPS: CI20: Reduce MSC0 frequency and add second percpu timer for SMP.
arch/mips/boot/dts/ingenic/ci20.dts | 23 ++++++++++++-----------
arch/mips/boot/dts/ingenic/gcw0.dts | 2 +-
arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++
arch/mips/boot/dts/ingenic/x1830.dtsi | 16 +++++++++++-----
4 files changed, 31 insertions(+), 17 deletions(-)
--
2.7.4
Powered by blists - more mailing lists