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Message-ID: <20210625175907.mkm5hef3rqyn2xu2@pengutronix.de>
Date: Fri, 25 Jun 2021 19:59:07 +0200
From: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To: Jitao Shi <jitao.shi@...iatek.com>
Cc: Thierry Reding <thierry.reding@...il.com>,
Lee Jones <lee.jones@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-pwm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
srv_heupstream@...iatek.com, yingjoe.chen@...iatek.com,
eddie.huang@...iatek.com, cawa.cheng@...iatek.com,
bibby.hsieh@...iatek.com, ck.hu@...iatek.com, stonea168@....com,
huijuan.xie@...iatek.com
Subject: Re: [PATCH v5 3/3] pwm: mtk_disp: implement atomic API .get_state()
On Wed, Jun 16, 2021 at 04:52:24PM +0800, Jitao Shi wrote:
> Switch the driver to support the .get_state() method.
>
> Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> ---
> drivers/pwm/pwm-mtk-disp.c | 39 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
> index a4766e931b68..d60a6b379683 100644
> --- a/drivers/pwm/pwm-mtk-disp.c
> +++ b/drivers/pwm/pwm-mtk-disp.c
> @@ -159,8 +159,47 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> return 0;
> }
>
> +static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
> + struct pwm_device *pwm,
> + struct pwm_state *state)
> +{
> + struct mtk_disp_pwm *mdp = to_mtk_disp_pwm(chip);
> + u32 clk_div, con0, con1;
> + u64 rate, period, high_width;
> + int err;
> +
> + if (!mdp->enabled) {
> + err = clk_prepare_enable(mdp->clk_main);
> + if (err < 0) {
> + dev_err(chip->dev, "Can't enable mdp->clk_main: %pe\n", ERR_PTR(err));
> + return;
> + }
> + err = clk_prepare_enable(mdp->clk_mm);
> + if (err < 0) {
> + dev_err(chip->dev, "Can't enable mdp->clk_mm: %pe\n", ERR_PTR(err));
> + clk_disable_unprepare(mdp->clk_main);
> + return;
> + }
> + }
As already written in reply to one of the previous patches: The
clk_prepare_enable() can be done unconditionally.
> + rate = clk_get_rate(mdp->clk_main);
> + con0 = readl(mdp->base + mdp->data->con0);
> + con1 = readl(mdp->base + mdp->data->con1);
> + state->enabled = !!(con0 & BIT(0));
Maybe introduce a name for that.
> + clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);
> + period = con1 & PWM_PERIOD_MASK;
FIELD_GET(PWM_PERIOD_MASK, con1) for consistency.
> + state->period = DIV64_U64_ROUND_UP(period * (clk_div + 1) * NSEC_PER_SEC, rate);
period has 12 bits, clk_div 11 and NSEC_PER_SEC has 30, so this cannot
overflow. Maybe mention this in a comment.
> + high_width = FIELD_GET(PWM_HIGH_WIDTH_MASK, con1);
> + state->duty_cycle = DIV64_U64_ROUND_UP(high_width * (clk_div + 1) * NSEC_PER_SEC,
> + rate);
state->polarity = PWM_POLARITY_NORMAL;
> + if (!mdp->enabled) {
> + clk_disable_unprepare(mdp->clk_mm);
> + clk_disable_unprepare(mdp->clk_main);
> + }
> +}
> +
> static const struct pwm_ops mtk_disp_pwm_ops = {
> .apply = mtk_disp_pwm_apply,
> + .get_state = mtk_disp_pwm_get_state,
> .owner = THIS_MODULE,
> };
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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