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Date:   Mon, 28 Jun 2021 10:35:54 +1000
From:   Eizan Miyamoto <eizan@...omium.org>
To:     Enric Balletbo i Serra <enric.balletbo@...labora.com>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        Eizan Miyamoto <eizan@...omium.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        drinkcat@...omium.org, hsinyi@...omium.org,
        Collabora Kernel ML <kernel@...labora.com>,
        CK Hu <ck.hu@...iatek.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] soc: mediatek: mmsys: Fix missing UFOE component in
 mt8173 table routing

Dear Enric,

Thanks so much for your hard work bisecting and crafting this patch.

I have verified that it fixes the DRM issues we were seeing on MT8173
with Linux 5.12.

Tested: Eizan Miyamoto <eizan@...omium.org>
On Fri, Jun 25, 2021 at 4:24 PM Enric Balletbo i Serra
<enric.balletbo@...labora.com> wrote:
>
> The UFOE (data compression engine) component needs to be enabled to have
> the imgtec gpu driver working. If we don't enable it we see a black screen.
> Looks like when we switched to use and array for setting the routing
> registers in commit 440147639ac7 ("soc: mediatek: mmsys: Use an array for
> setting the routing registers") we missed to add this component in the new
> routing table, it was present before taht commit, so fix it by adding
> this component in the mt8173 routing table.
>
> Fixes: 440147639ac7 ("soc: mediatek: mmsys: Use an array for setting the routing registers")
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> ---
>
>  drivers/soc/mediatek/mtk-mmsys.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
> index a760a34e6eca..11388961dded 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.h
> +++ b/drivers/soc/mediatek/mtk-mmsys.h
> @@ -209,6 +209,9 @@ static const struct mtk_mmsys_routes mmsys_default_routing_table[] = {
>         }, {
>                 DDP_COMPONENT_RDMA2, DDP_COMPONENT_DSI3,
>                 DISP_REG_CONFIG_DSIO_SEL_IN, DSI3_SEL_IN_RDMA2
> +       }, {
> +               DDP_COMPONENT_UFOE, DDP_COMPONENT_DSI0,
> +               DISP_REG_CONFIG_DISP_UFOE_MOUT_EN, UFOE_MOUT_EN_DSI0,
>         }
>  };
>
> --
> 2.30.2
>

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