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Message-ID: <CAMj1kXG-O5PLnEWGWXzYf2r471ng7j-jZ2ziTwLdSgdVFdJNaA@mail.gmail.com>
Date: Wed, 30 Jun 2021 09:30:14 +0200
From: Ard Biesheuvel <ardb@...nel.org>
To: Atish Patra <atishp@...shpatra.org>
Cc: Heinrich Schuchardt <xypron.glpk@....de>,
Andreas Schwab <schwab@...ux-m68k.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atish.patra@....com>,
linux-efi <linux-efi@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] RISC-V: load initrd wherever it fits into memory
On Wed, 30 Jun 2021 at 00:56, Atish Patra <atishp@...shpatra.org> wrote:
>
> On Tue, Jun 29, 2021 at 6:40 AM Heinrich Schuchardt <xypron.glpk@....de> wrote:
> >
> > Requiring that initrd is loaded below RAM start + 256 MiB led to failure
> > to boot SUSE Linux with GRUB on QEMU, cf.
> > https://lists.gnu.org/archive/html/grub-devel/2021-06/msg00037.html
> >
> > Remove the constraint.
> >
> > Reported-by: Andreas Schwab <schwab@...ux-m68k.org>
> > Signed-off-by: Heinrich Schuchardt <xypron.glpk@....de>
> > ---
> > arch/riscv/include/asm/efi.h | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/efi.h b/arch/riscv/include/asm/efi.h
> > index 7542282f1141..649ab513dc99 100644
> > --- a/arch/riscv/include/asm/efi.h
> > +++ b/arch/riscv/include/asm/efi.h
> > @@ -33,10 +33,10 @@ static inline unsigned long efi_get_max_fdt_addr(unsigned long image_addr)
> >
> > #define ARCH_EFI_IRQ_FLAGS_MASK (SR_IE | SR_SPIE)
> >
> > -/* Load initrd at enough distance from DRAM start */
> > +/* Load initrd anywhere in system RAM */
> > static inline unsigned long efi_get_max_initrd_addr(unsigned long image_addr)
> > {
> > - return image_addr + SZ_256M;
> > + return ULONG_MAX;
> > }
> >
> > #define alloc_screen_info(x...) (&screen_info)
> > --
> > 2.30.2
> >
>
> LGTM
>
> Reviewed-by: Atish Patra <atish.patra@....com>
>
Acked-by: Ard Biesheuvel <ardb@...nel.org>
Please take this via the RISC-V tree.
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