[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <256365bbd9cf526a4cc4c1a48b4bd215@codeaurora.org>
Date: Thu, 01 Jul 2021 01:33:31 +0530
From: Sibi Sankar <sibis@...eaurora.org>
To: Matthias Kaehlcke <mka@...omium.org>
Cc: bjorn.andersson@...aro.org, robh+dt@...nel.org, will@...nel.org,
saiprakash.ranjan@...eaurora.org, ohad@...ery.com,
agross@...nel.org, mathieu.poirier@...aro.org,
robin.murphy@....com, joro@...tes.org, p.zabel@...gutronix.de,
linux-arm-msm@...r.kernel.org, linux-remoteproc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, evgreen@...omium.org,
dianders@...omium.org, swboyd@...omium.org
Subject: Re: [PATCH 8/9] arm64: dts: qcom: sc7280: Add Q6V5 MSS node
On 2021-06-29 00:09, Matthias Kaehlcke wrote:
> On Fri, Jun 25, 2021 at 01:17:37AM +0530, Sibi Sankar wrote:
>> This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs.
>>
>> Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 40
>> ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 40 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3fb6a6ef39f8..56ea172f641f 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -584,6 +584,46 @@
>> #power-domain-cells = <1>;
>> };
>>
>> + remoteproc_mpss: remoteproc@...0000 {
>> + compatible = "qcom,sc7280-mpss-pas";
>> + reg = <0 0x04080000 0 0x10000>;
>> +
>> + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
>> + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
>
> looks like this patch/series depends on "Enable miscellaneous hardware
> blocks to boot WPSS"
> (https://patchwork.kernel.org/project/linux-arm-msm/list/?series=475089)
> which is not mentioned.
^^ is already in lnext so didn't mention it.
>
>> + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
>> + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
>> + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
>> + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
>> + interrupt-names = "wdog", "fatal", "ready", "handover",
>> + "stop-ack", "shutdown-ack";
>> +
>> + clocks = <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "xo";
>> +
>> + power-domains = <&rpmhpd SC7280_CX>,
>> + <&rpmhpd SC7280_MSS>;
>> + power-domain-names = "cx", "mss";
>> +
>> + memory-region = <&mpss_mem>;
>> +
>> + qcom,qmp = <&aoss_qmp>;
>> +
>> + qcom,smem-states = <&modem_smp2p_out 0>;
>> + qcom,smem-state-names = "stop";
>> +
>> + status = "disabled";
>> +
>> + glink-edge {
>> + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
>> + IPCC_MPROC_SIGNAL_GLINK_QMP
>> + IRQ_TYPE_EDGE_RISING>;
>> + mboxes = <&ipcc IPCC_CLIENT_MPSS
>> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
>> + label = "modem";
>> + qcom,remote-pid = <1>;
>> + };
>> + };
>> +
>> stm@...2000 {
>> compatible = "arm,coresight-stm", "arm,primecell";
>> reg = <0 0x06002000 0 0x1000>,
>
> Reviewed-by: Matthias Kaehlcke <mka@...omium.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Powered by blists - more mailing lists