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Message-ID: <mhng-d63a7488-73a5-451e-9bf8-52ded7f2e15c@palmerdabbelt-glaptop>
Date: Wed, 30 Jun 2021 19:38:28 -0700 (PDT)
From: Palmer Dabbelt <palmerdabbelt@...gle.com>
To: elver@...gle.com
CC: liushixin2@...wei.com, Paul Walmsley <paul.walmsley@...ive.com>,
aou@...s.berkeley.edu, glider@...gle.com, dvyukov@...gle.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
kasan-dev@...glegroups.com
Subject: Re: [PATCH -next v2] riscv: Enable KFENCE for riscv64
On Wed, 16 Jun 2021 02:11:53 PDT (-0700), elver@...gle.com wrote:
> On Tue, 15 Jun 2021 at 04:35, Liu Shixin <liushixin2@...wei.com> wrote:
>> Add architecture specific implementation details for KFENCE and enable
>> KFENCE for the riscv64 architecture. In particular, this implements the
>> required interface in <asm/kfence.h>.
>>
>> KFENCE requires that attributes for pages from its memory pool can
>> individually be set. Therefore, force the kfence pool to be mapped at
>> page granularity.
>>
>> Testing this patch using the testcases in kfence_test.c and all passed.
>>
>> Signed-off-by: Liu Shixin <liushixin2@...wei.com>
>> Acked-by: Marco Elver <elver@...gle.com>
>> Reviewed-by: Kefeng Wang <wangkefeng.wang@...wei.com>
>
> I can't see this in -next yet. It would be nice if riscv64 could get
> KFENCE support.
Thanks, this is on for-next. I'm just doing a boot test with
CONFIG_KFENCE=y (and whatever that turns on for defconfig), let me know
if there's anything more interesting to test on the KFENCE side of
things.
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