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Message-ID: <YO6ome7Opd6kjqua@smile.fi.intel.com>
Date: Wed, 14 Jul 2021 12:04:25 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Rob Herring <robh@...nel.org>
Cc: shruthi.sanil@...el.com, daniel.lezcano@...aro.org,
tglx@...utronix.de, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, kris.pan@...ux.intel.com,
mgross@...ux.intel.com, srikanth.thokala@...el.com,
lakshmi.bai.raja.subramanian@...el.com,
mallikarjunappa.sangannavar@...el.com
Subject: Re: [PATCH v4 1/2] dt-bindings: timer: Add bindings for Intel Keem
Bay SoC Timer
On Tue, Jul 13, 2021 at 08:47:56PM -0600, Rob Herring wrote:
> On Mon, Jun 28, 2021 at 11:44:09AM +0530, shruthi.sanil@...el.com wrote:
> > + The parent node represents the common general configuration details and
> > + the child nodes represents the counter and timers.
>
> I don't think all the child nodes are necessary. Are the counters and
> timers configurable (say on another SoC)? If not, then a single node
> here would suffice.
If you may notice the children may have different properties that can't be
known ahead, such as IRQ line. On some platforms it may be this mapping, on
another it maybe different.
With all respect for the simplification I think we can't do it here.
--
With Best Regards,
Andy Shevchenko
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