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Message-ID: <196808b0-fa78-eab4-d68b-45bded788f86@intel.com>
Date:   Mon, 2 Aug 2021 08:22:46 -0700
From:   Dave Jiang <dave.jiang@...el.com>
To:     Arnd Bergmann <arnd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        x86@...nel.org
Cc:     Arnd Bergmann <arnd@...db.de>, "H. Peter Anvin" <hpa@...or.com>,
        Tony Luck <tony.luck@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Ben Widawsky <ben.widawsky@...el.com>,
        Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
        Arvind Sankar <nivedita@...m.mit.edu>,
        Peter Zijlstra <peterz@...radead.org>,
        Vinod Koul <vkoul@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86/asm: fix gcc-5 enqcmds() build failure


On 8/2/2021 7:53 AM, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@...db.de>
>
> Building drivers/dma/idxd/submit.o with gcc-5.5 results in a cryptic
> error messages:
>
> arch/x86/include/asm/special_insns.h: Assembler messages:
> arch/x86/include/asm/special_insns.h:286: Error: operand size mismatch for `setz'
> make[5]: *** [scripts/Makefile.build:272: drivers/dma/idxd/submit.o] Error 1
>
> It seems that this happens for 32-bit arguments when the instruction
> expects an 8-bit argument. Change the type of the local variable
> accordingly to get a clean build.
>
> Fixes: 7f5933f81bd8 ("x86/asm: Add an enqcmds() wrapper for the ENQCMDS instruction")
> Fixes: 8e50d392652f ("dmaengine: idxd: Add shared workqueue support") # guessed
> Signed-off-by: Arnd Bergmann <arnd@...db.de>

Acked-by: Dave Jiang <dave.jiang@...el.com>

Thanks!

> ---
>   arch/x86/include/asm/special_insns.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
> index f3fbb84ff8a7..33264839f99e 100644
> --- a/arch/x86/include/asm/special_insns.h
> +++ b/arch/x86/include/asm/special_insns.h
> @@ -275,7 +275,7 @@ static inline int enqcmds(void __iomem *dst, const void *src)
>   {
>   	const struct { char _[64]; } *__src = src;
>   	struct { char _[64]; } __iomem *__dst = dst;
> -	int zf;
> +	u8 zf;
>   
>   	/*
>   	 * ENQCMDS %(rdx), rax

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