lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 3 Aug 2021 13:23:14 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sibi Sankar <sibis@...eaurora.org>
Cc:     mka@...omium.org, bjorn.andersson@...aro.org,
        linux-pm@...r.kernel.org, agross@...nel.org, rjw@...ysocki.net,
        dianders@...omium.org, linux-arm-msm@...r.kernel.org,
        sboyd@...nel.org, tdas@...eaurora.org, devicetree@...r.kernel.org,
        viresh.kumar@...aro.org, linux-kernel@...r.kernel.org,
        robh+dt@...nel.org
Subject: Re: [PATCH 1/4] dt-bindings: cpufreq: cpufreq-qcom-hw: Add
 compatible for SM8250/8350

On Thu, 29 Jul 2021 23:34:42 +0530, Sibi Sankar wrote:
> Re-arranging the register regions to support per core L3 DCVS would lead
> to bindings breakage when using an older dt with a newer kernel. So,
> document the EPSS compatible for SM8250/SM8350 SoCs and use them in the
> CPUFreq-hw driver to prevent such breakages.
> 
> Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
> ---
>  Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@...nel.org>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ