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Message-ID: <b0d6ff2a-24af-96c1-62a1-8b920c63e05a@canonical.com>
Date: Thu, 5 Aug 2021 09:36:47 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Alim Akhtar <alim.akhtar@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Pankaj Dubey <pankaj.dubey@...sung.com>,
Sam Protsenko <semen.protsenko@...aro.org>,
Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH] arm64: dts: exynos: correct GIC CPU interfaces address
range on Exynos7
On 05/08/2021 09:21, Krzysztof Kozlowski wrote:
> The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by
> ARM).
>
I underestimated the issue - this is actually bug as there is a GICC_DIR
register at offset 0x1000. Therefore:
Fixes: b9024cbc937d ("arm64: dts: Add initial device tree support for exynos7")
> Reported-by: Sam Protsenko <semen.protsenko@...aro.org>
> Reported-by: Marc Zyngier <maz@...nel.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 8b06397ba6e7..c73a597ca66e 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -137,7 +137,7 @@ gic: interrupt-controller@...01000 {
> #address-cells = <0>;
> interrupt-controller;
> reg = <0x11001000 0x1000>,
> - <0x11002000 0x1000>,
> + <0x11002000 0x2000>,
> <0x11004000 0x2000>,
> <0x11006000 0x2000>;
> };
>
Best regards,
Krzysztof
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