lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAAOTY_90UteUjOgJ5w7vKW6amXCfps7=SennwYYk2=TUrr6aYA@mail.gmail.com>
Date:   Mon, 9 Aug 2021 22:44:52 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     Jitao Shi <jitao.shi@...iatek.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        David Airlie <airlied@...ux.ie>,
        DRI Development <dri-devel@...ts.freedesktop.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        CK Hu <ck.hu@...iatek.com>, stonea168@....com,
        huijuan.xie@...iatek.com, Rex-BC Chen <rex-bc.chen@...iatek.com>,
        shuijing.li@...iatek.com, Rob Herring <robh+dt@...nel.org>,
        DTML <devicetree@...r.kernel.org>
Subject: Re: [PATCH v6 1/1] drm/mediatek: force hsa hbp hfp packets multiple
 of lanenum to avoid screen shift

Hi, Jitao:

Jitao Shi <jitao.shi@...iatek.com> 於 2021年8月8日 週日 下午9:41寫道:
>
> The bridge chip ANX7625 requires the packets on lanes aligned at the end,
> or ANX7625 will shift the screen.

In anx7625_attach_dsi(), it call mipi_dsi_attach(), and it call into
mtk_dsi_host_attach().
I would like to pass this information from anx7623 driver to mtk_dsi
driver when attach.

Regards,
Chun-Kuang.

>
> Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index ae403c67cbd9..033234d51e86 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -194,6 +194,8 @@ struct mtk_dsi {
>         struct clk *hs_clk;
>
>         u32 data_rate;
> +       /* force dsi line end without dsi_null data */
> +       bool force_dsi_end_without_null;
>
>         unsigned long mode_flags;
>         enum mipi_dsi_pixel_format format;
> @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
>                 DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");
>         }
>
> +       if (dsi->force_dsi_end_without_null) {
> +               horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2;
> +               horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2;
> +               horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2;
> +               horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes;
> +       }
> +
>         writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
>         writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
>         writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
> @@ -1095,6 +1104,10 @@ static int mtk_dsi_probe(struct platform_device *pdev)
>         dsi->bridge.of_node = dev->of_node;
>         dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
>
> +       if (dsi->next_bridge)
> +               dsi->force_dsi_end_without_null = of_device_is_compatible(dsi->next_bridge->of_node,
> +                                                                         "analogix,anx7625");
> +
>         drm_bridge_add(&dsi->bridge);
>
>         ret = component_add(&pdev->dev, &mtk_dsi_component_ops);
> --
> 2.25.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ