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Message-ID: <CAOQ_QshxJgSP1y0R3uCgGepTKTqQkU4ELv3BTmQNPY0-B4rTsA@mail.gmail.com>
Date:   Mon, 9 Aug 2021 09:16:38 -0700
From:   Oliver Upton <oupton@...gle.com>
To:     Marc Zyngier <maz@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Mark Rutland <mark.rutland@....com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Peter Shier <pshier@...gle.com>,
        Raghavendra Rao Ananta <rananta@...gle.com>,
        Ricardo Koller <ricarkol@...gle.com>,
        Will Deacon <will@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Linus Walleij <linus.walleij@...aro.org>,
        kernel-team@...roid.com
Subject: Re: [PATCH 04/13] clocksource/arm_arch_timer: Move drop _tval from
 erratum function names

On Mon, Aug 9, 2021 at 8:27 AM Marc Zyngier <maz@...nel.org> wrote:
>
> The '_tval' name in the erratum handling function names doesn't
> make much sense anymore (and they were using CVAL the first place).
>
> Drop the _tval tag.
>
> Signed-off-by: Marc Zyngier <maz@...nel.org>

Reviewed-by: Oliver Upton <oupton@...gle.com>

> ---
>  drivers/clocksource/arm_arch_timer.c | 26 +++++++++++++-------------
>  1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 898a07dc01cd..160464f75017 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -371,7 +371,7 @@ EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
>
>  static atomic_t timer_unstable_counter_workaround_in_use = ATOMIC_INIT(0);
>
> -static void erratum_set_next_event_tval_generic(const int access, unsigned long evt,
> +static void erratum_set_next_event_generic(const int access, unsigned long evt,
>                                                 struct clock_event_device *clk)
>  {
>         unsigned long ctrl;
> @@ -392,17 +392,17 @@ static void erratum_set_next_event_tval_generic(const int access, unsigned long
>         arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
>  }
>
> -static __maybe_unused int erratum_set_next_event_tval_virt(unsigned long evt,
> +static __maybe_unused int erratum_set_next_event_virt(unsigned long evt,
>                                             struct clock_event_device *clk)
>  {
> -       erratum_set_next_event_tval_generic(ARCH_TIMER_VIRT_ACCESS, evt, clk);
> +       erratum_set_next_event_generic(ARCH_TIMER_VIRT_ACCESS, evt, clk);
>         return 0;
>  }
>
> -static __maybe_unused int erratum_set_next_event_tval_phys(unsigned long evt,
> +static __maybe_unused int erratum_set_next_event_phys(unsigned long evt,
>                                             struct clock_event_device *clk)
>  {
> -       erratum_set_next_event_tval_generic(ARCH_TIMER_PHYS_ACCESS, evt, clk);
> +       erratum_set_next_event_generic(ARCH_TIMER_PHYS_ACCESS, evt, clk);
>         return 0;
>  }
>
> @@ -414,8 +414,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>                 .desc = "Freescale erratum a005858",
>                 .read_cntpct_el0 = fsl_a008585_read_cntpct_el0,
>                 .read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
> -               .set_next_event_phys = erratum_set_next_event_tval_phys,
> -               .set_next_event_virt = erratum_set_next_event_tval_virt,
> +               .set_next_event_phys = erratum_set_next_event_phys,
> +               .set_next_event_virt = erratum_set_next_event_virt,
>         },
>  #endif
>  #ifdef CONFIG_HISILICON_ERRATUM_161010101
> @@ -425,8 +425,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>                 .desc = "HiSilicon erratum 161010101",
>                 .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
>                 .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
> -               .set_next_event_phys = erratum_set_next_event_tval_phys,
> -               .set_next_event_virt = erratum_set_next_event_tval_virt,
> +               .set_next_event_phys = erratum_set_next_event_phys,
> +               .set_next_event_virt = erratum_set_next_event_virt,
>         },
>         {
>                 .match_type = ate_match_acpi_oem_info,
> @@ -434,8 +434,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>                 .desc = "HiSilicon erratum 161010101",
>                 .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
>                 .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
> -               .set_next_event_phys = erratum_set_next_event_tval_phys,
> -               .set_next_event_virt = erratum_set_next_event_tval_virt,
> +               .set_next_event_phys = erratum_set_next_event_phys,
> +               .set_next_event_virt = erratum_set_next_event_virt,
>         },
>  #endif
>  #ifdef CONFIG_ARM64_ERRATUM_858921
> @@ -454,8 +454,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
>                 .desc = "Allwinner erratum UNKNOWN1",
>                 .read_cntpct_el0 = sun50i_a64_read_cntpct_el0,
>                 .read_cntvct_el0 = sun50i_a64_read_cntvct_el0,
> -               .set_next_event_phys = erratum_set_next_event_tval_phys,
> -               .set_next_event_virt = erratum_set_next_event_tval_virt,
> +               .set_next_event_phys = erratum_set_next_event_phys,
> +               .set_next_event_virt = erratum_set_next_event_virt,
>         },
>  #endif
>  #ifdef CONFIG_ARM64_ERRATUM_1418040
> --
> 2.30.2
>

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