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Message-ID: <202108100135.OgPtRZv8-lkp@intel.com>
Date: Tue, 10 Aug 2021 01:25:43 +0800
From: kernel test robot <lkp@...el.com>
To: Zhengxun Li <zhengxunli@...c.com.tw>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Mark Brown <broonie@...nel.org>
Subject: [broonie-misc:spi-5.15 22/23] drivers/spi/spi-mxic.c:401:3: warning:
this 'if' clause does not guard...
tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git spi-5.15
head: 5c842e51ac63130a1344650b0a95bdc398666947
commit: d05aaa66ba3ca3fdc2b5cd774ff218deb238b352 [22/23] spi: mxic: patch for octal DTR mode support
config: arc-randconfig-r026-20210809 (attached as .config)
compiler: arceb-elf-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git/commit/?id=d05aaa66ba3ca3fdc2b5cd774ff218deb238b352
git remote add broonie-misc https://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc.git
git fetch --no-tags broonie-misc spi-5.15
git checkout d05aaa66ba3ca3fdc2b5cd774ff218deb238b352
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
drivers/spi/spi-mxic.c: In function 'mxic_spi_mem_exec_op':
>> drivers/spi/spi-mxic.c:401:3: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
401 | if (op->data.dir == SPI_MEM_DATA_IN)
| ^~
drivers/spi/spi-mxic.c:403:4: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if'
403 | if (op->data.dtr)
| ^~
vim +/if +401 drivers/spi/spi-mxic.c
b942d80b0a394e Mason Yang 2018-10-17 359
b942d80b0a394e Mason Yang 2018-10-17 360 static int mxic_spi_mem_exec_op(struct spi_mem *mem,
b942d80b0a394e Mason Yang 2018-10-17 361 const struct spi_mem_op *op)
b942d80b0a394e Mason Yang 2018-10-17 362 {
b942d80b0a394e Mason Yang 2018-10-17 363 struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master);
b942d80b0a394e Mason Yang 2018-10-17 364 int nio = 1, i, ret;
b942d80b0a394e Mason Yang 2018-10-17 365 u32 ss_ctrl;
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 366 u8 addr[8], cmd[2];
b942d80b0a394e Mason Yang 2018-10-17 367
b942d80b0a394e Mason Yang 2018-10-17 368 ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
b942d80b0a394e Mason Yang 2018-10-17 369 if (ret)
b942d80b0a394e Mason Yang 2018-10-17 370 return ret;
b942d80b0a394e Mason Yang 2018-10-17 371
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 372 if (mem->spi->mode & (SPI_TX_OCTAL | SPI_RX_OCTAL))
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 373 nio = 8;
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 374 else if (mem->spi->mode & (SPI_TX_QUAD | SPI_RX_QUAD))
b942d80b0a394e Mason Yang 2018-10-17 375 nio = 4;
b942d80b0a394e Mason Yang 2018-10-17 376 else if (mem->spi->mode & (SPI_TX_DUAL | SPI_RX_DUAL))
b942d80b0a394e Mason Yang 2018-10-17 377 nio = 2;
b942d80b0a394e Mason Yang 2018-10-17 378
b942d80b0a394e Mason Yang 2018-10-17 379 writel(HC_CFG_NIO(nio) |
b942d80b0a394e Mason Yang 2018-10-17 380 HC_CFG_TYPE(mem->spi->chip_select, HC_CFG_TYPE_SPI_NOR) |
b942d80b0a394e Mason Yang 2018-10-17 381 HC_CFG_SLV_ACT(mem->spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1) |
b942d80b0a394e Mason Yang 2018-10-17 382 HC_CFG_MAN_CS_EN,
b942d80b0a394e Mason Yang 2018-10-17 383 mxic->regs + HC_CFG);
b942d80b0a394e Mason Yang 2018-10-17 384 writel(HC_EN_BIT, mxic->regs + HC_EN);
b942d80b0a394e Mason Yang 2018-10-17 385
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 386 ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) |
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 387 OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) |
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 388 (op->cmd.dtr ? OP_CMD_DDR : 0);
b942d80b0a394e Mason Yang 2018-10-17 389
b942d80b0a394e Mason Yang 2018-10-17 390 if (op->addr.nbytes)
b942d80b0a394e Mason Yang 2018-10-17 391 ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) |
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 392 OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) |
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 393 (op->addr.dtr ? OP_ADDR_DDR : 0);
b942d80b0a394e Mason Yang 2018-10-17 394
b942d80b0a394e Mason Yang 2018-10-17 395 if (op->dummy.nbytes)
b942d80b0a394e Mason Yang 2018-10-17 396 ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes);
b942d80b0a394e Mason Yang 2018-10-17 397
b942d80b0a394e Mason Yang 2018-10-17 398 if (op->data.nbytes) {
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 399 ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) |
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 400 (op->data.dtr ? OP_DATA_DDR : 0);
b942d80b0a394e Mason Yang 2018-10-17 @401 if (op->data.dir == SPI_MEM_DATA_IN)
b942d80b0a394e Mason Yang 2018-10-17 402 ss_ctrl |= OP_READ;
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 403 if (op->data.dtr)
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 404 ss_ctrl |= OP_DQS_EN;
b942d80b0a394e Mason Yang 2018-10-17 405 }
b942d80b0a394e Mason Yang 2018-10-17 406
b942d80b0a394e Mason Yang 2018-10-17 407 writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select));
b942d80b0a394e Mason Yang 2018-10-17 408
b942d80b0a394e Mason Yang 2018-10-17 409 writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
b942d80b0a394e Mason Yang 2018-10-17 410 mxic->regs + HC_CFG);
b942d80b0a394e Mason Yang 2018-10-17 411
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 412 for (i = 0; i < op->cmd.nbytes; i++)
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 413 cmd[i] = op->cmd.opcode >> (8 * (op->cmd.nbytes - i - 1));
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 414
d05aaa66ba3ca3 Zhengxun Li 2021-08-04 415 ret = mxic_spi_data_xfer(mxic, cmd, NULL, op->cmd.nbytes);
b942d80b0a394e Mason Yang 2018-10-17 416 if (ret)
b942d80b0a394e Mason Yang 2018-10-17 417 goto out;
b942d80b0a394e Mason Yang 2018-10-17 418
b942d80b0a394e Mason Yang 2018-10-17 419 for (i = 0; i < op->addr.nbytes; i++)
b942d80b0a394e Mason Yang 2018-10-17 420 addr[i] = op->addr.val >> (8 * (op->addr.nbytes - i - 1));
b942d80b0a394e Mason Yang 2018-10-17 421
b942d80b0a394e Mason Yang 2018-10-17 422 ret = mxic_spi_data_xfer(mxic, addr, NULL, op->addr.nbytes);
b942d80b0a394e Mason Yang 2018-10-17 423 if (ret)
b942d80b0a394e Mason Yang 2018-10-17 424 goto out;
b942d80b0a394e Mason Yang 2018-10-17 425
b942d80b0a394e Mason Yang 2018-10-17 426 ret = mxic_spi_data_xfer(mxic, NULL, NULL, op->dummy.nbytes);
b942d80b0a394e Mason Yang 2018-10-17 427 if (ret)
b942d80b0a394e Mason Yang 2018-10-17 428 goto out;
b942d80b0a394e Mason Yang 2018-10-17 429
b942d80b0a394e Mason Yang 2018-10-17 430 ret = mxic_spi_data_xfer(mxic,
b942d80b0a394e Mason Yang 2018-10-17 431 op->data.dir == SPI_MEM_DATA_OUT ?
b942d80b0a394e Mason Yang 2018-10-17 432 op->data.buf.out : NULL,
b942d80b0a394e Mason Yang 2018-10-17 433 op->data.dir == SPI_MEM_DATA_IN ?
b942d80b0a394e Mason Yang 2018-10-17 434 op->data.buf.in : NULL,
b942d80b0a394e Mason Yang 2018-10-17 435 op->data.nbytes);
b942d80b0a394e Mason Yang 2018-10-17 436
b942d80b0a394e Mason Yang 2018-10-17 437 out:
b942d80b0a394e Mason Yang 2018-10-17 438 writel(readl(mxic->regs + HC_CFG) & ~HC_CFG_MAN_CS_ASSERT,
b942d80b0a394e Mason Yang 2018-10-17 439 mxic->regs + HC_CFG);
b942d80b0a394e Mason Yang 2018-10-17 440 writel(0, mxic->regs + HC_EN);
b942d80b0a394e Mason Yang 2018-10-17 441
b942d80b0a394e Mason Yang 2018-10-17 442 return ret;
b942d80b0a394e Mason Yang 2018-10-17 443 }
b942d80b0a394e Mason Yang 2018-10-17 444
:::::: The code at line 401 was first introduced by commit
:::::: b942d80b0a394e8ea18fce3b032b4700439e8ca3 spi: Add MXIC controller driver
:::::: TO: Mason Yang <masonccyang@...c.com.tw>
:::::: CC: Mark Brown <broonie@...nel.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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