linux-kernel - Re: [PATCH 03/11] dt-bindings: usb: mtk-xhci: add compatible for mt8195

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <cd1662f5f47fe7539d2c01bd280ad8b9d9d25b3e.camel@mediatek.com>
Date:   Wed, 11 Aug 2021 08:02:38 +0000
From:   Chunfeng Yun (云春峰) 
        <Chunfeng.Yun@...iatek.com>
To:     "robh@...nel.org" <robh@...nel.org>
CC:     "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "mathias.nyman@...el.com" <mathias.nyman@...el.com>,
        Eddie Hung (洪正鑫) 
        <Eddie.Hung@...iatek.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>
Subject: Re: [PATCH 03/11] dt-bindings: usb: mtk-xhci: add compatible for
 mt8195

On Fri, 2021-08-06 at 14:43 -0600, Rob Herring wrote:
> On Fri, Jul 30, 2021 at 04:49:54PM +0800, Chunfeng Yun wrote:
> > There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
> > exclude IP0) have a wrong default SOF/ITP interval which is
> > calculated from the frame counter clock 24Mhz by default, but
> > in fact, the frame counter clock is 48Mhz, so we should set
> > the accurate interval according to 48Mhz. Here add a new compatible
> > for MT8195, it's also supported in driver. But the first controller
> > (IP0) has no such issue, we prefer to use generic compatible,
> > e.g. mt8192's compatible.
> 
> That only works until you find some 8195 bug common to all
> instances. 
It's also OK for IP0 to use mt8195's compatible, these setting value is
the same as IP0's default value, use mt8192's may avoid these dummy
setting.

> Can't you read the clock frequency?
No, it may be divided internally, not the same as the clock source.

> 
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
> > ---
> >  Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-
> > xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-
> > xhci.yaml
> > index 61a0e550b5d6..753e043e5327 100644
> > --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> > +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
> > @@ -31,6 +31,7 @@ properties:
> >            - mediatek,mt8173-xhci
> >            - mediatek,mt8183-xhci
> >            - mediatek,mt8192-xhci
> > +          - mediatek,mt8195-xhci
> >        - const: mediatek,mtk-xhci
> >  
> >    reg:
> > -- 
> > 2.18.0
> > 
> >