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Message-ID: <CACRpkdZ5owo0rfOqysLpu+La+0p5SgNkjW6OFbG9tsOmtNJEtA@mail.gmail.com>
Date: Wed, 11 Aug 2021 16:45:04 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Michal Simek <michal.simek@...inx.com>
Cc: Piyush Mehta <piyush.mehta@...inx.com>,
Arnd Bergmann <arnd@...db.de>, Zou Wei <zou_wei@...wei.com>,
Greg KH <gregkh@...uxfoundation.org>, wendy.liang@...inx.com,
Nobuhiro Iwamatsu <iwamatsu@...auri.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>, rajan.vaja@...inx.com,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, git <git@...inx.com>,
Srinivas Goud <sgoud@...inx.com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 3/3] gpio: modepin: Add driver support for modepin GPIO controller
On Wed, Aug 11, 2021 at 3:30 PM Michal Simek <michal.simek@...inx.com> wrote:
> They are bootmode pins because that pins are designed and used by ROM to
> get information which boot device should be used.
> But after this is it is really behaving as generic purpose I/O pins.
> Xilinx is using them for years for usb phy resets. I have also seen them
> to be used for other reset functionality.
OK if they are used for general purpose tasks then a GPIO driver
is fine, I was worried that it was just a way to read these pins from
userspace.
Go ahead with this patch series!
Yours,
Linus Walleij
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