linux-kernel - Re: [PATCH V2 1/3] firmware: zynqmp: Add MMIO read and write support for PS

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Message-ID: <CACRpkdbZouNdL43=nVLZd3hOeVQTLOZT=5FHGuM+3q3Ah2M9yQ@mail.gmail.com>
Date:   Wed, 11 Aug 2021 17:14:20 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Piyush Mehta <piyush.mehta@...inx.com>
Cc:     Arnd Bergmann <arnd@...db.de>, Zou Wei <zou_wei@...wei.com>,
        Greg KH <gregkh@...uxfoundation.org>,
        Michal Simek <michal.simek@...inx.com>, wendy.liang@...inx.com,
        Nobuhiro Iwamatsu <iwamatsu@...auri.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Rob Herring <robh+dt@...nel.org>, rajan.vaja@...inx.com,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, git <git@...inx.com>,
        Srinivas Goud <sgoud@...inx.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 1/3] firmware: zynqmp: Add MMIO read and write support
 for PS_MODE pin

On Thu, Aug 5, 2021 at 7:42 PM Piyush Mehta <piyush.mehta@...inx.com> wrote:

> Add Xilinx ZynqMP firmware MMIO APIs support to set and get PS_MODE
> pins value and status. These APIs create an interface path between
> mode pin controller driver and low-level API to access GPIO pins.
>
> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
> ---
> Changes in v2:

After Michals description of how this is controlling USB
PHY and misc resets I'm OK with the concept.
Acked-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij