lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <a64c83a5-641a-84cf-a208-41c87afd61cf@intel.com>
Date:   Thu, 12 Aug 2021 13:01:46 +0300
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Michał Mirosław <mirq-linux@...e.qmqm.pl>
Cc:     Michal Simek <michal.simek@...inx.com>,
        Kevin Liu <kliu5@...vell.com>,
        Suneel Garapati <suneel.garapati@...inx.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        Al Cooper <alcooperx@...il.com>
Subject: Re: [PATCH v4 4/5] mmc: sdhci: move
 SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

On 7/08/21 5:12 pm, Michał Mirosław wrote:
> On Wed, Aug 04, 2021 at 03:33:56PM +0300, Adrian Hunter wrote:
>> On 25/07/21 12:20 pm, Michał Mirosław wrote:
>>> Push handling of clock frequency dependence for
>>> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.
>> What is the max_clk dependency for, and why push it down?
> 
> I guess this is a workaround for a hardware issue. When I wrote this,
> there was only a single user. Now I don't know if the second user got
> the limit by accident or just uses the flag not knowing it doesn't work
> as the quirk name suggests. IOW this makes it easier to fix in drivers
> if the limit is wrong or irrelevant. The dependency doesn't feel like
> it belongs to the generic driver anyway.

Would you mind reaching out to the authors of the relevant patches
and drivers to try to find out the purpose of the max_clk dependency,
before we make any changes?


> 
> [...]
>>> @@ -318,6 +317,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
>>>  	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
>>>  	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
>>>  
>>> +	if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
>>> +		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
>>> +
>>>  	return 0;
>>>  }
>>>  
>>> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
>>> index 0993f7d0ce8e..cfa314e659bc 100644
>>> --- a/drivers/mmc/host/sdhci.c
>>> +++ b/drivers/mmc/host/sdhci.c
>>> @@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
>>>  			/* Version 3.00 divisors must be a multiple of 2. */
>>>  			if (host->max_clk <= clock) {
>>>  				div = 1;
>>> -				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
>>> -					&& host->max_clk <= 25000000)
>>> +				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
>>>  					div = 2;
>>>  			} else {
>>>  				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ