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Message-Id: <1629344185-27368-10-git-send-email-sibis@codeaurora.org>
Date: Thu, 19 Aug 2021 09:06:24 +0530
From: Sibi Sankar <sibis@...eaurora.org>
To: bjorn.andersson@...aro.org, robh+dt@...nel.org, will@...nel.org,
saiprakash.ranjan@...eaurora.org, swboyd@...omium.org,
mka@...omium.org
Cc: ohad@...ery.com, agross@...nel.org, mathieu.poirier@...aro.org,
robin.murphy@....com, joro@...tes.org, p.zabel@...gutronix.de,
linux-arm-msm@...r.kernel.org, linux-remoteproc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, evgreen@...omium.org,
dianders@...omium.org, Sibi Sankar <sibis@...eaurora.org>
Subject: [PATCH v3 09/10] arm64: dts: qcom: sc7280: Add Q6V5 MSS node
This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@...omium.org>
Reviewed-by: Stephen Boyd <swboyd@...omium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index bd1ac93017ae..93ae3ee8c5a6 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -699,6 +699,46 @@
#power-domain-cells = <1>;
};
+ remoteproc_mpss: remoteproc@...0000 {
+ compatible = "qcom,sc7280-mpss-pas";
+ reg = <0 0x04080000 0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SC7280_CX>,
+ <&rpmhpd SC7280_MSS>;
+ power-domain-names = "cx", "mss";
+
+ memory-region = <&mpss_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ };
+ };
+
stm@...2000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0 0x06002000 0 0x1000>,
--
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