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Message-Id: <1629344185-27368-11-git-send-email-sibis@codeaurora.org>
Date: Thu, 19 Aug 2021 09:06:25 +0530
From: Sibi Sankar <sibis@...eaurora.org>
To: bjorn.andersson@...aro.org, robh+dt@...nel.org, will@...nel.org,
saiprakash.ranjan@...eaurora.org, swboyd@...omium.org,
mka@...omium.org
Cc: ohad@...ery.com, agross@...nel.org, mathieu.poirier@...aro.org,
robin.murphy@....com, joro@...tes.org, p.zabel@...gutronix.de,
linux-arm-msm@...r.kernel.org, linux-remoteproc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, evgreen@...omium.org,
dianders@...omium.org, Sibi Sankar <sibis@...eaurora.org>
Subject: [PATCH v3 10/10] arm64: dts: qcom: sc7280: Update Q6V5 MSS node
Update MSS node to support MSA based modem boot on SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
---
v3:
* Place remoteproc_mpss node in alphabetical order above pinctrl
section. [Stephen]
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 7 +++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 19 ++++++++++++++++---
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 103d89c1e1c7..f1c8641b0c26 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -263,6 +263,13 @@
status = "okay";
};
+&remoteproc_mpss {
+ status = "okay";
+ compatible = "qcom,sc7280-mss-pil";
+ iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
+ memory-region = <&mba_mem &mpss_mem>;
+};
+
&sdhc_1 {
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 93ae3ee8c5a6..7ad0cbe1a0a2 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -701,7 +701,8 @@
remoteproc_mpss: remoteproc@...0000 {
compatible = "qcom,sc7280-mpss-pas";
- reg = <0 0x04080000 0 0x10000>;
+ reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>;
+ reg-names = "qdsp6", "rmb";
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
@@ -712,8 +713,11 @@
interrupt-names = "wdog", "fatal", "ready", "handover",
"stop-ack", "shutdown-ack";
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+ <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
+ <&gcc GCC_MSS_SNOC_AXI_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "offline", "snoc_axi", "xo";
power-domains = <&rpmhpd SC7280_CX>,
<&rpmhpd SC7280_MSS>;
@@ -726,6 +730,15 @@
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+ <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
+ qcom,ext-regs = <&tcsr_regs 0x10000 0x10004
+ &tcsr_mutex 0x26004 0x26008>;
+ qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
+
status = "disabled";
glink-edge {
--
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