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Message-ID: <c586d864-994f-2d24-9b29-2933b567be84@gmail.com>
Date:   Mon, 23 Aug 2021 00:19:08 +0200
From:   Alex Bee <knaerzche@...il.com>
To:     Heiko Stuebner <heiko@...ech.de>
Cc:     Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: Fix GPU register width for RK3328

Hi Heiko,

is there anything left to do for this one?

Same for:

https://patchwork.kernel.org/project/linux-rockchip/patch/20210623145918.187018-1-knaerzche@gmail.com/

and

https://patchwork.kernel.org/project/linux-rockchip/patch/20210623150208.187201-1-knaerzche@gmail.com/

Alex

Am 23.06.21 um 13:59 schrieb Alex Bee:
> As can be seen in RK3328's TRM the register range for the GPU is
> 0xff300000 to 0xff330000.
> It would (and does in vendor kernel) overlap with the registers of
> the HEVC encoder (node/driver do not exist yet in upstream kernel).
> See already existing h265e_mmu node.
>
> Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node")
> Signed-off-by: Alex Bee <knaerzche@...il.com>
> ---
>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 8c821acb21ff..da84be6f4715 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -599,7 +599,7 @@ saradc: adc@...80000 {
>   
>   	gpu: gpu@...00000 {
>   		compatible = "rockchip,rk3328-mali", "arm,mali-450";
> -		reg = <0x0 0xff300000 0x0 0x40000>;
> +		reg = <0x0 0xff300000 0x0 0x30000>;
>   		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
>   			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
>   			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,

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