[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <162974163915.2977894.9290643400538669916.b4-ty@sntech.de>
Date: Mon, 23 Aug 2021 20:42:13 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Alex Bee <knaerzche@...il.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-rockchip@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH] arm64: dts: rockchip: Fix GPU register width for RK3328
On Wed, 23 Jun 2021 13:59:26 +0200, Alex Bee wrote:
> As can be seen in RK3328's TRM the register range for the GPU is
> 0xff300000 to 0xff330000.
> It would (and does in vendor kernel) overlap with the registers of
> the HEVC encoder (node/driver do not exist yet in upstream kernel).
> See already existing h265e_mmu node.
Applied, thanks!
[1/1] arm64: dts: rockchip: Fix GPU register width for RK3328
commit: 3f1c9b99f22c4784bd6f439a63bbf8a61c0335b1
Best regards,
--
Heiko Stuebner <heiko@...ech.de>
Powered by blists - more mailing lists